40 lines
1.3 KiB
Plaintext
40 lines
1.3 KiB
Plaintext
* Freescale IMX8MN IOMUX Controller
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Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory
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for common binding part and usage.
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Required properties:
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- compatible: "fsl,imx8mn-iomuxc"
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- reg: should contain the base physical address and size of the iomuxc
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registers.
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Required properties in sub-nodes:
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- fsl,pins: each entry consists of 6 integers and represents the mux and config
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setting for one pin. The first 5 integers <mux_reg conf_reg input_reg mux_val
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input_val> are specified using a PIN_FUNC_ID macro, which can be found in
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<arch/arm64/boot/dts/freescale/imx8mn-pinfunc.h>. The last integer CONFIG is
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the pad setting value like pull-up on this pin. Please refer to i.MX8M Nano
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Reference Manual for detailed CONFIG settings.
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Examples:
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1>;
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};
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iomuxc: pinctrl@30330000 {
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compatible = "fsl,imx8mn-iomuxc";
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reg = <0x0 0x30330000 0x0 0x10000>;
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pinctrl_uart1: uart1grp {
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fsl,pins = <
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MX8MN_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140
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MX8MN_IOMUXC_UART1_TXD_UART1_DCE_TX 0x140
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MX8MN_IOMUXC_UART3_RXD_UART1_DCE_CTS_B 0x140
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MX8MN_IOMUXC_UART3_TXD_UART1_DCE_RTS_B 0x140
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MX8MN_IOMUXC_SD1_DATA4_GPIO2_IO6 0x19
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>;
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};
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};
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