397 lines
10 KiB
C
397 lines
10 KiB
C
// SPDX-License-Identifier: GPL-2.0
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#define DISABLE_BRANCH_PROFILING
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#define pr_fmt(fmt) "kasan: " fmt
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/* cpu_feature_enabled() cannot be used this early */
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#define USE_EARLY_PGTABLE_L5
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#include <linux/memblock.h>
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#include <linux/kasan.h>
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#include <linux/kdebug.h>
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#include <linux/mm.h>
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#include <linux/sched.h>
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#include <linux/sched/task.h>
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#include <linux/vmalloc.h>
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#include <asm/e820/types.h>
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#include <asm/pgalloc.h>
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#include <asm/tlbflush.h>
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#include <asm/sections.h>
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#include <asm/pgtable.h>
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#include <asm/cpu_entry_area.h>
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extern struct range pfn_mapped[E820_MAX_ENTRIES];
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static p4d_t tmp_p4d_table[MAX_PTRS_PER_P4D] __initdata __aligned(PAGE_SIZE);
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static __init void *early_alloc(size_t size, int nid, bool should_panic)
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{
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void *ptr = memblock_alloc_try_nid(size, size,
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__pa(MAX_DMA_ADDRESS), MEMBLOCK_ALLOC_ACCESSIBLE, nid);
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if (!ptr && should_panic)
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panic("%pS: Failed to allocate page, nid=%d from=%lx\n",
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(void *)_RET_IP_, nid, __pa(MAX_DMA_ADDRESS));
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return ptr;
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}
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static void __init kasan_populate_pmd(pmd_t *pmd, unsigned long addr,
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unsigned long end, int nid)
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{
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pte_t *pte;
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if (pmd_none(*pmd)) {
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void *p;
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if (boot_cpu_has(X86_FEATURE_PSE) &&
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((end - addr) == PMD_SIZE) &&
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IS_ALIGNED(addr, PMD_SIZE)) {
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p = early_alloc(PMD_SIZE, nid, false);
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if (p && pmd_set_huge(pmd, __pa(p), PAGE_KERNEL))
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return;
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else if (p)
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memblock_free(__pa(p), PMD_SIZE);
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}
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p = early_alloc(PAGE_SIZE, nid, true);
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pmd_populate_kernel(&init_mm, pmd, p);
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}
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pte = pte_offset_kernel(pmd, addr);
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do {
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pte_t entry;
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void *p;
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if (!pte_none(*pte))
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continue;
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p = early_alloc(PAGE_SIZE, nid, true);
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entry = pfn_pte(PFN_DOWN(__pa(p)), PAGE_KERNEL);
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set_pte_at(&init_mm, addr, pte, entry);
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} while (pte++, addr += PAGE_SIZE, addr != end);
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}
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static void __init kasan_populate_pud(pud_t *pud, unsigned long addr,
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unsigned long end, int nid)
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{
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pmd_t *pmd;
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unsigned long next;
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if (pud_none(*pud)) {
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void *p;
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if (boot_cpu_has(X86_FEATURE_GBPAGES) &&
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((end - addr) == PUD_SIZE) &&
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IS_ALIGNED(addr, PUD_SIZE)) {
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p = early_alloc(PUD_SIZE, nid, false);
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if (p && pud_set_huge(pud, __pa(p), PAGE_KERNEL))
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return;
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else if (p)
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memblock_free(__pa(p), PUD_SIZE);
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}
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p = early_alloc(PAGE_SIZE, nid, true);
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pud_populate(&init_mm, pud, p);
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}
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pmd = pmd_offset(pud, addr);
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do {
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next = pmd_addr_end(addr, end);
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if (!pmd_large(*pmd))
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kasan_populate_pmd(pmd, addr, next, nid);
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} while (pmd++, addr = next, addr != end);
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}
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static void __init kasan_populate_p4d(p4d_t *p4d, unsigned long addr,
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unsigned long end, int nid)
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{
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pud_t *pud;
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unsigned long next;
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if (p4d_none(*p4d)) {
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void *p = early_alloc(PAGE_SIZE, nid, true);
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p4d_populate(&init_mm, p4d, p);
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}
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pud = pud_offset(p4d, addr);
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do {
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next = pud_addr_end(addr, end);
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if (!pud_large(*pud))
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kasan_populate_pud(pud, addr, next, nid);
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} while (pud++, addr = next, addr != end);
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}
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static void __init kasan_populate_pgd(pgd_t *pgd, unsigned long addr,
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unsigned long end, int nid)
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{
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void *p;
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p4d_t *p4d;
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unsigned long next;
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if (pgd_none(*pgd)) {
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p = early_alloc(PAGE_SIZE, nid, true);
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pgd_populate(&init_mm, pgd, p);
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}
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p4d = p4d_offset(pgd, addr);
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do {
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next = p4d_addr_end(addr, end);
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kasan_populate_p4d(p4d, addr, next, nid);
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} while (p4d++, addr = next, addr != end);
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}
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static void __init kasan_populate_shadow(unsigned long addr, unsigned long end,
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int nid)
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{
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pgd_t *pgd;
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unsigned long next;
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addr = addr & PAGE_MASK;
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end = round_up(end, PAGE_SIZE);
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pgd = pgd_offset_k(addr);
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do {
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next = pgd_addr_end(addr, end);
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kasan_populate_pgd(pgd, addr, next, nid);
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} while (pgd++, addr = next, addr != end);
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}
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static void __init map_range(struct range *range)
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{
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unsigned long start;
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unsigned long end;
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start = (unsigned long)kasan_mem_to_shadow(pfn_to_kaddr(range->start));
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end = (unsigned long)kasan_mem_to_shadow(pfn_to_kaddr(range->end));
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kasan_populate_shadow(start, end, early_pfn_to_nid(range->start));
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}
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static void __init clear_pgds(unsigned long start,
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unsigned long end)
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{
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pgd_t *pgd;
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/* See comment in kasan_init() */
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unsigned long pgd_end = end & PGDIR_MASK;
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for (; start < pgd_end; start += PGDIR_SIZE) {
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pgd = pgd_offset_k(start);
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/*
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* With folded p4d, pgd_clear() is nop, use p4d_clear()
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* instead.
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*/
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if (pgtable_l5_enabled())
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pgd_clear(pgd);
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else
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p4d_clear(p4d_offset(pgd, start));
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}
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pgd = pgd_offset_k(start);
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for (; start < end; start += P4D_SIZE)
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p4d_clear(p4d_offset(pgd, start));
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}
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static inline p4d_t *early_p4d_offset(pgd_t *pgd, unsigned long addr)
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{
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unsigned long p4d;
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if (!pgtable_l5_enabled())
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return (p4d_t *)pgd;
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p4d = pgd_val(*pgd) & PTE_PFN_MASK;
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p4d += __START_KERNEL_map - phys_base;
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return (p4d_t *)p4d + p4d_index(addr);
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}
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static void __init kasan_early_p4d_populate(pgd_t *pgd,
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unsigned long addr,
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unsigned long end)
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{
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pgd_t pgd_entry;
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p4d_t *p4d, p4d_entry;
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unsigned long next;
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if (pgd_none(*pgd)) {
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pgd_entry = __pgd(_KERNPG_TABLE |
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__pa_nodebug(kasan_early_shadow_p4d));
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set_pgd(pgd, pgd_entry);
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}
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p4d = early_p4d_offset(pgd, addr);
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do {
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next = p4d_addr_end(addr, end);
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if (!p4d_none(*p4d))
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continue;
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p4d_entry = __p4d(_KERNPG_TABLE |
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__pa_nodebug(kasan_early_shadow_pud));
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set_p4d(p4d, p4d_entry);
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} while (p4d++, addr = next, addr != end && p4d_none(*p4d));
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}
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static void __init kasan_map_early_shadow(pgd_t *pgd)
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{
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/* See comment in kasan_init() */
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unsigned long addr = KASAN_SHADOW_START & PGDIR_MASK;
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unsigned long end = KASAN_SHADOW_END;
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unsigned long next;
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pgd += pgd_index(addr);
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do {
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next = pgd_addr_end(addr, end);
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kasan_early_p4d_populate(pgd, addr, next);
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} while (pgd++, addr = next, addr != end);
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}
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#ifdef CONFIG_KASAN_INLINE
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static int kasan_die_handler(struct notifier_block *self,
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unsigned long val,
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void *data)
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{
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if (val == DIE_GPF) {
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pr_emerg("CONFIG_KASAN_INLINE enabled\n");
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pr_emerg("GPF could be caused by NULL-ptr deref or user memory access\n");
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}
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return NOTIFY_OK;
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}
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static struct notifier_block kasan_die_notifier = {
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.notifier_call = kasan_die_handler,
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};
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#endif
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void __init kasan_early_init(void)
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{
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int i;
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pteval_t pte_val = __pa_nodebug(kasan_early_shadow_page) |
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__PAGE_KERNEL | _PAGE_ENC;
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pmdval_t pmd_val = __pa_nodebug(kasan_early_shadow_pte) | _KERNPG_TABLE;
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pudval_t pud_val = __pa_nodebug(kasan_early_shadow_pmd) | _KERNPG_TABLE;
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p4dval_t p4d_val = __pa_nodebug(kasan_early_shadow_pud) | _KERNPG_TABLE;
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/* Mask out unsupported __PAGE_KERNEL bits: */
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pte_val &= __default_kernel_pte_mask;
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pmd_val &= __default_kernel_pte_mask;
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pud_val &= __default_kernel_pte_mask;
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p4d_val &= __default_kernel_pte_mask;
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for (i = 0; i < PTRS_PER_PTE; i++)
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kasan_early_shadow_pte[i] = __pte(pte_val);
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for (i = 0; i < PTRS_PER_PMD; i++)
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kasan_early_shadow_pmd[i] = __pmd(pmd_val);
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for (i = 0; i < PTRS_PER_PUD; i++)
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kasan_early_shadow_pud[i] = __pud(pud_val);
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for (i = 0; pgtable_l5_enabled() && i < PTRS_PER_P4D; i++)
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kasan_early_shadow_p4d[i] = __p4d(p4d_val);
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kasan_map_early_shadow(early_top_pgt);
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kasan_map_early_shadow(init_top_pgt);
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}
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void __init kasan_init(void)
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{
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int i;
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void *shadow_cpu_entry_begin, *shadow_cpu_entry_end;
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#ifdef CONFIG_KASAN_INLINE
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register_die_notifier(&kasan_die_notifier);
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#endif
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memcpy(early_top_pgt, init_top_pgt, sizeof(early_top_pgt));
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/*
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* We use the same shadow offset for 4- and 5-level paging to
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* facilitate boot-time switching between paging modes.
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* As result in 5-level paging mode KASAN_SHADOW_START and
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* KASAN_SHADOW_END are not aligned to PGD boundary.
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*
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* KASAN_SHADOW_START doesn't share PGD with anything else.
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* We claim whole PGD entry to make things easier.
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*
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* KASAN_SHADOW_END lands in the last PGD entry and it collides with
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* bunch of things like kernel code, modules, EFI mapping, etc.
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* We need to take extra steps to not overwrite them.
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*/
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if (pgtable_l5_enabled()) {
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void *ptr;
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ptr = (void *)pgd_page_vaddr(*pgd_offset_k(KASAN_SHADOW_END));
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memcpy(tmp_p4d_table, (void *)ptr, sizeof(tmp_p4d_table));
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set_pgd(&early_top_pgt[pgd_index(KASAN_SHADOW_END)],
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__pgd(__pa(tmp_p4d_table) | _KERNPG_TABLE));
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}
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load_cr3(early_top_pgt);
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__flush_tlb_all();
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clear_pgds(KASAN_SHADOW_START & PGDIR_MASK, KASAN_SHADOW_END);
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kasan_populate_early_shadow((void *)(KASAN_SHADOW_START & PGDIR_MASK),
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kasan_mem_to_shadow((void *)PAGE_OFFSET));
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for (i = 0; i < E820_MAX_ENTRIES; i++) {
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if (pfn_mapped[i].end == 0)
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break;
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map_range(&pfn_mapped[i]);
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}
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shadow_cpu_entry_begin = (void *)CPU_ENTRY_AREA_BASE;
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shadow_cpu_entry_begin = kasan_mem_to_shadow(shadow_cpu_entry_begin);
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shadow_cpu_entry_begin = (void *)round_down(
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(unsigned long)shadow_cpu_entry_begin, PAGE_SIZE);
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shadow_cpu_entry_end = (void *)(CPU_ENTRY_AREA_BASE +
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CPU_ENTRY_AREA_MAP_SIZE);
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shadow_cpu_entry_end = kasan_mem_to_shadow(shadow_cpu_entry_end);
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shadow_cpu_entry_end = (void *)round_up(
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(unsigned long)shadow_cpu_entry_end, PAGE_SIZE);
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kasan_populate_early_shadow(
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kasan_mem_to_shadow((void *)PAGE_OFFSET + MAXMEM),
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shadow_cpu_entry_begin);
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kasan_populate_shadow((unsigned long)shadow_cpu_entry_begin,
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(unsigned long)shadow_cpu_entry_end, 0);
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kasan_populate_early_shadow(shadow_cpu_entry_end,
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kasan_mem_to_shadow((void *)__START_KERNEL_map));
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kasan_populate_shadow((unsigned long)kasan_mem_to_shadow(_stext),
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(unsigned long)kasan_mem_to_shadow(_end),
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early_pfn_to_nid(__pa(_stext)));
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kasan_populate_early_shadow(kasan_mem_to_shadow((void *)MODULES_END),
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(void *)KASAN_SHADOW_END);
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load_cr3(init_top_pgt);
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__flush_tlb_all();
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/*
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* kasan_early_shadow_page has been used as early shadow memory, thus
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* it may contain some garbage. Now we can clear and write protect it,
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* since after the TLB flush no one should write to it.
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*/
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memset(kasan_early_shadow_page, 0, PAGE_SIZE);
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for (i = 0; i < PTRS_PER_PTE; i++) {
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pte_t pte;
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pgprot_t prot;
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prot = __pgprot(__PAGE_KERNEL_RO | _PAGE_ENC);
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pgprot_val(prot) &= __default_kernel_pte_mask;
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pte = __pte(__pa(kasan_early_shadow_page) | pgprot_val(prot));
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set_pte(&kasan_early_shadow_pte[i], pte);
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}
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/* Flush TLBs again to be sure that write protection applied. */
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__flush_tlb_all();
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init_task.kasan_depth = 0;
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pr_info("KernelAddressSanitizer initialized\n");
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}
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