61 lines
1.7 KiB
C
61 lines
1.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Port on Texas Instruments TMS320C6x architecture
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*
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* Copyright (C) 2004, 2009, 2010, 2011 Texas Instruments Incorporated
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* Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
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*/
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#ifndef _ASM_C6X_SPECIAL_INSNS_H
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#define _ASM_C6X_SPECIAL_INSNS_H
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#define get_creg(reg) \
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({ unsigned int __x; \
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asm volatile ("mvc .s2 " #reg ",%0\n" : "=b"(__x)); __x; })
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#define set_creg(reg, v) \
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do { unsigned int __x = (unsigned int)(v); \
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asm volatile ("mvc .s2 %0," #reg "\n" : : "b"(__x)); \
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} while (0)
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#define or_creg(reg, n) \
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do { unsigned __x, __n = (unsigned)(n); \
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asm volatile ("mvc .s2 " #reg ",%0\n" \
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"or .l2 %1,%0,%0\n" \
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"mvc .s2 %0," #reg "\n" \
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"nop\n" \
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: "=&b"(__x) : "b"(__n)); \
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} while (0)
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#define and_creg(reg, n) \
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do { unsigned __x, __n = (unsigned)(n); \
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asm volatile ("mvc .s2 " #reg ",%0\n" \
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"and .l2 %1,%0,%0\n" \
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"mvc .s2 %0," #reg "\n" \
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"nop\n" \
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: "=&b"(__x) : "b"(__n)); \
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} while (0)
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#define get_coreid() (get_creg(DNUM) & 0xff)
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/* Set/get IST */
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#define set_ist(x) set_creg(ISTP, x)
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#define get_ist() get_creg(ISTP)
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/*
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* Exception management
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*/
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#define disable_exception()
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#define get_except_type() get_creg(EFR)
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#define ack_exception(type) set_creg(ECR, 1 << (type))
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#define get_iexcept() get_creg(IERR)
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#define set_iexcept(mask) set_creg(IERR, (mask))
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#define _extu(x, s, e) \
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({ unsigned int __x; \
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asm volatile ("extu .S2 %3,%1,%2,%0\n" : \
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"=b"(__x) : "n"(s), "n"(e), "b"(x)); \
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__x; })
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#endif /* _ASM_C6X_SPECIAL_INSNS_H */
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