72 lines
1.6 KiB
C
72 lines
1.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/* Copyright(c) 2009-2014 Realtek Corporation.*/
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#ifndef __RTL92E_DEF_H__
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#define __RTL92E_DEF_H__
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#define RX_DESC_NUM_92E 512
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#define HAL_PRIME_CHNL_OFFSET_DONT_CARE 0
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#define HAL_PRIME_CHNL_OFFSET_LOWER 1
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#define HAL_PRIME_CHNL_OFFSET_UPPER 2
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#define RX_MPDU_QUEUE 0
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#define IS_HT_RATE(_rate) \
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(_rate >= DESC92C_RATEMCS0)
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#define IS_CCK_RATE(_rate) \
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(_rate >= DESC92C_RATE1M && _rate <= DESC92C_RATE11M)
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#define IS_OFDM_RATE(_rate) \
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(_rate >= DESC92C_RATE6M && _rate <= DESC92C_RATE54M)
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enum version_8192e {
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VERSION_TEST_CHIP_2T2R_8192E = 0x0024,
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VERSION_NORMAL_CHIP_2T2R_8192E = 0x102C,
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VERSION_UNKNOWN = 0xFF,
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};
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enum rtl_desc_qsel {
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QSLT_BK = 0x2,
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QSLT_BE = 0x0,
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QSLT_VI = 0x5,
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QSLT_VO = 0x7,
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QSLT_BEACON = 0x10,
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QSLT_HIGH = 0x11,
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QSLT_MGNT = 0x12,
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QSLT_CMD = 0x13,
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};
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enum rtl_desc92c_rate {
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DESC92C_RATE1M = 0x00,
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DESC92C_RATE2M = 0x01,
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DESC92C_RATE5_5M = 0x02,
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DESC92C_RATE11M = 0x03,
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DESC92C_RATE6M = 0x04,
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DESC92C_RATE9M = 0x05,
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DESC92C_RATE12M = 0x06,
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DESC92C_RATE18M = 0x07,
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DESC92C_RATE24M = 0x08,
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DESC92C_RATE36M = 0x09,
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DESC92C_RATE48M = 0x0a,
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DESC92C_RATE54M = 0x0b,
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DESC92C_RATEMCS0 = 0x0c,
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DESC92C_RATEMCS1 = 0x0d,
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DESC92C_RATEMCS2 = 0x0e,
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DESC92C_RATEMCS3 = 0x0f,
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DESC92C_RATEMCS4 = 0x10,
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DESC92C_RATEMCS5 = 0x11,
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DESC92C_RATEMCS6 = 0x12,
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DESC92C_RATEMCS7 = 0x13,
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DESC92C_RATEMCS8 = 0x14,
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DESC92C_RATEMCS9 = 0x15,
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DESC92C_RATEMCS10 = 0x16,
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DESC92C_RATEMCS11 = 0x17,
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DESC92C_RATEMCS12 = 0x18,
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DESC92C_RATEMCS13 = 0x19,
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DESC92C_RATEMCS14 = 0x1a,
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DESC92C_RATEMCS15 = 0x1b,
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};
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#endif
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