702 lines
16 KiB
C
Executable File
702 lines
16 KiB
C
Executable File
/*
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* drivers/net/phy/motorcomm.c
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*
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* Driver for Motorcomm PHYs
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*
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* Author: Leilei Zhao <leilei.zhao@motorcomm.com>
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*
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* Copyright (c) 2019 Motorcomm, Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* Support : Motorcomm Phys:
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* Giga phys: yt8511, yt8521
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* 100/10 Phys : yt8512, yt8512b, yt8510
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* Automotive 100Mb Phys : yt8010
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* Automotive 100/10 hyper range Phys: yt8510
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/phy.h>
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#include <linux/motorcomm_phy.h>
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#include <linux/of.h>
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#include <linux/clk.h>
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#define GMAC_CLOCK_INPUT_NEEDED 1 //some GMAC need clock input from PHY, for eg., 125M
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static int ytphy_read_ext(struct phy_device *phydev, u32 regnum)
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{
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int ret;
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int val;
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ret = phy_write(phydev, REG_DEBUG_ADDR_OFFSET, regnum);
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if (ret < 0)
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return ret;
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val = phy_read(phydev, REG_DEBUG_DATA);
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return val;
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}
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static int ytphy_write_ext(struct phy_device *phydev, u32 regnum, u16 val)
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{
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int ret;
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ret = phy_write(phydev, REG_DEBUG_ADDR_OFFSET, regnum);
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if (ret < 0)
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return ret;
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ret = phy_write(phydev, REG_DEBUG_DATA, val);
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return ret;
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}
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static int yt8010_config_aneg(struct phy_device *phydev)
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{
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phydev->speed = SPEED_100;
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return 0;
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}
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static int yt8512_clk_init(struct phy_device *phydev)
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{
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int ret;
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int val;
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val = ytphy_read_ext(phydev, YT8512_EXTREG_AFE_PLL);
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if (val < 0)
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return val;
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val |= YT8512_CONFIG_PLL_REFCLK_SEL_EN;
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ret = ytphy_write_ext(phydev, YT8512_EXTREG_AFE_PLL, val);
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if (ret < 0)
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return ret;
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val = ytphy_read_ext(phydev, YT8512_EXTREG_EXTEND_COMBO);
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if (val < 0)
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return val;
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val |= YT8512_CONTROL1_RMII_EN;
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ret = ytphy_write_ext(phydev, YT8512_EXTREG_EXTEND_COMBO, val);
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if (ret < 0)
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return ret;
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val = phy_read(phydev, MII_BMCR);
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if (val < 0)
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return val;
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val |= YT_SOFTWARE_RESET;
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ret = phy_write(phydev, MII_BMCR, val);
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return ret;
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}
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static int yt8512_led_init(struct phy_device *phydev)
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{
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int ret;
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int val;
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int mask;
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val = ytphy_read_ext(phydev, YT8512_EXTREG_LED0);
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if (val < 0)
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return val;
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val |= YT8512_LED0_ACT_BLK_IND;
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mask = YT8512_LED0_DIS_LED_AN_TRY | YT8512_LED0_BT_BLK_EN |
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YT8512_LED0_HT_BLK_EN | YT8512_LED0_COL_BLK_EN |
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YT8512_LED0_BT_ON_EN;
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val &= ~mask;
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ret = ytphy_write_ext(phydev, YT8512_EXTREG_LED0, val);
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if (ret < 0)
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return ret;
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val = ytphy_read_ext(phydev, YT8512_EXTREG_LED1);
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if (val < 0)
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return val;
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val |= YT8512_LED1_BT_ON_EN;
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mask = YT8512_LED1_TXACT_BLK_EN | YT8512_LED1_RXACT_BLK_EN;
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val &= ~mask;
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ret = ytphy_write_ext(phydev, YT8512_LED1_BT_ON_EN, val);
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return ret;
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}
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static int yt8512_config_init(struct phy_device *phydev)
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{
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int ret;
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int val;
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#if 0
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ret = genphy_config_init(phydev);
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if (ret < 0)
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return ret;
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#endif
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ret = yt8512_clk_init(phydev);
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if (ret < 0)
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return ret;
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ret = yt8512_led_init(phydev);
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/* disable auto sleep */
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val = ytphy_read_ext(phydev, YT8512_EXTREG_SLEEP_CONTROL1);
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if (val < 0)
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return val;
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val &= (~BIT(YT8512_EN_SLEEP_SW_BIT));
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ret = ytphy_write_ext(phydev, YT8512_EXTREG_SLEEP_CONTROL1, val);
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if (ret < 0)
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return ret;
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return ret;
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}
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static int yt8512_read_status(struct phy_device *phydev)
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{
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int ret;
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int val;
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int speed, speed_mode, duplex;
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ret = genphy_update_link(phydev);
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if (ret)
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return ret;
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val = phy_read(phydev, REG_PHY_SPEC_STATUS);
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if (val < 0)
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return val;
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duplex = (val & YT8512_DUPLEX) >> YT8512_DUPLEX_BIT;
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speed_mode = (val & YT8512_SPEED_MODE) >> YT8512_SPEED_MODE_BIT;
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switch (speed_mode) {
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case 0:
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speed = SPEED_10;
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break;
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case 1:
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speed = SPEED_100;
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break;
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case 2:
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case 3:
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default:
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speed = SPEED_UNKNOWN;
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break;
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}
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phydev->speed = speed;
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phydev->duplex = duplex;
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return 0;
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}
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int yt8521_soft_reset(struct phy_device *phydev)
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{
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int ret;
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ytphy_write_ext(phydev, 0xa000, 0);
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ret = genphy_soft_reset(phydev);
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if (ret < 0)
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return ret;
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ytphy_write_ext(phydev, 0xa000, 2);
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ret = genphy_soft_reset(phydev);
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if (ret < 0) {
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ytphy_write_ext(phydev, 0xa000, 0);
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return ret;
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}
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return 0;
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}
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#if GMAC_CLOCK_INPUT_NEEDED
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/* zuozhongkai add 2021/4/22 */
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static int yt8511_rd_ext(struct phy_device *phydev, u32 regnum)
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{
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int val;
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phy_write(phydev, REG_DEBUG_ADDR_OFFSET, regnum);
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val = phy_read(phydev, REG_DEBUG_DATA);
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return val;
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}
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static int yt8511_wr_ext(struct phy_device *phydev, u32 regnum, u16 val)
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{
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int ret;
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ret = phy_write(phydev, REG_DEBUG_ADDR_OFFSET, regnum);
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ret = phy_write(phydev, REG_DEBUG_DATA, val);
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return ret;
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}
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int yt8511_config_txdelay(struct phy_device *phydev, u8 delay)
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{
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int ret;
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int val;
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/* disable auto sleep */
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val = yt8511_rd_ext(phydev, 0x27);
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if (val < 0)
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return val;
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val &= (~BIT(15));
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ret = yt8511_wr_ext(phydev, 0x27, val);
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if (ret < 0)
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return ret;
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/* enable RXC clock when no wire plug */
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val = yt8511_rd_ext(phydev, 0xc);
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if (val < 0)
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return val;
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/* ext reg 0xc b[7:4]
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Tx Delay time = 150ps * N – 250ps
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*/
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val &= ~(0xf << delay);
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val |= (0x7 << delay); //150ps * 7 - 250ps
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ret = yt8511_wr_ext(phydev, 0xc, val);
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return ret;
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}
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int yt8511_config_out_125m(struct phy_device *phydev)
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{
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int ret;
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int val;
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/* disable auto sleep */
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val = yt8511_rd_ext(phydev, 0x27);
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if (val < 0)
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return val;
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val &= (~BIT(15));
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ret = yt8511_wr_ext(phydev, 0x27, val);
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if (ret < 0)
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return ret;
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/* enable RXC clock when no wire plug */
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val = yt8511_rd_ext(phydev, 0xc);
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if (val < 0)
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return val;
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/* ext reg 0xc.b[2:1]
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00-----25M from pll;
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01---- 25M from xtl;(default)
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10-----62.5M from pll;
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11----125M from pll(here set to this value)
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*/
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val |= (3 << 1);
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ret = yt8511_wr_ext(phydev, 0xc, val);
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return ret;
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}
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static int yt8511_config_init(struct phy_device *phydev)
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{
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yt8511_config_out_125m(phydev);
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yt8511_config_txdelay(phydev, 4);
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return 0;
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}
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#endif /*GMAC_CLOCK_INPUT_NEEDED*/
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#define YT8521_NUM_OF_FIBER_PHY 3
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static unsigned long autoneg_phydev[YT8521_NUM_OF_FIBER_PHY];
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//static int autoneg_pre_val[YT8521_NUM_OF_FIBER_PHY];
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static int autoneg_changed[YT8521_NUM_OF_FIBER_PHY];
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static int autoneg_actual_num_phy = 0;
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static int yt8521_config_init(struct phy_device *phydev)
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{
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int ret;
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int val;
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/* start workaround for 8521 100m fiber init*/
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int i;
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for(i = 0; i < YT8521_NUM_OF_FIBER_PHY; i++)
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{
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if((autoneg_phydev[i]) && (autoneg_phydev[i] == (unsigned long)phydev->attached_dev))
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{
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autoneg_changed[i] = 0;
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break;
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}else if(0 == autoneg_phydev[i])
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{
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autoneg_phydev[i] = (unsigned long)phydev->attached_dev;
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autoneg_changed[i] = 0;
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autoneg_actual_num_phy++;
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printk("yzhnag..8521 fiber workaround init for eth%d,macbase=%#lx\n", i,autoneg_phydev[i]);
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break;
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}
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}
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/*end of workaround for 8521 */
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phydev->irq = PHY_POLL;
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ytphy_write_ext(phydev, 0xa000, 0);
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#if 0
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ret = genphy_config_init(phydev);
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if (ret < 0)
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return ret;
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#endif
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/* disable auto sleep */
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val = ytphy_read_ext(phydev, YT8521_EXTREG_SLEEP_CONTROL1);
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if (val < 0)
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return val;
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val &= (~BIT(YT8521_EN_SLEEP_SW_BIT));
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ret = ytphy_write_ext(phydev, YT8521_EXTREG_SLEEP_CONTROL1, val);
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if (ret < 0)
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return ret;
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/* enable RXC clock when no wire plug */
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ret = ytphy_write_ext(phydev, 0xa000, 0);
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if (ret < 0)
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return ret;
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val = ytphy_read_ext(phydev, 0xc);
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if (val < 0)
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return val;
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val &= ~(1 << 12);
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ret = ytphy_write_ext(phydev, 0xc, val);
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if (ret < 0)
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return ret;
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printk (KERN_INFO "yzhang..8521 init call out...\n");
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return ret;
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}
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static int yt8521_adjust_status(struct phy_device *phydev, int val, int is_utp)
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{
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int speed_mode, duplex;
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int speed = SPEED_UNKNOWN;
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//printk (KERN_INFO "yzhang..8521 status adjust call in...\n");
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duplex = (val & YT8512_DUPLEX) >> YT8521_DUPLEX_BIT;
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speed_mode = (val & YT8521_SPEED_MODE) >> YT8521_SPEED_MODE_BIT;
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switch (speed_mode) {
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case 0:
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if (is_utp)
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speed = SPEED_10;
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break;
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case 1:
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speed = SPEED_100;
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break;
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case 2:
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speed = SPEED_1000;
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break;
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case 3:
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break;
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default:
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speed = SPEED_UNKNOWN;
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break;
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}
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phydev->speed = speed;
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phydev->duplex = duplex;
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//printk (KERN_INFO "yzhang..8521 status adjust call out,regval=0x%04x,mode=%s,speed=%dm...\n", val,is_utp?"utp":"fiber", phydev->speed);
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return 0;
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}
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#define YT8521_PHY_MODE_FIBER 1 //fiber mode only
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#define YT8521_PHY_MODE_UTP 2 //utp mode only
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#define YT8521_PHY_MODE_POLL 3 //fiber and utp, poll mode
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#define YT8521_PHY_MODE_CURR 3
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static int link_mode_8521 = 0; //0: no link; 1: utp; 32: fiber. traced that 1000m fiber uses 32.
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int yt8521_aneg_done (struct phy_device *phydev)
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{
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//printk("yzhang-phy..YT8521 AN_done callin,speed=%dm,linkmoded=%d\n", phydev->speed,link_mode_8521);
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if((32 == link_mode_8521) && (SPEED_100 == phydev->speed))
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{
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return 1/*link_mode_8521*/;
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}
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#if 0
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else
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{
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val = ytphy_read_ext(phydev, 0xa000);
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if((2 == val/*fiber mode*/) && (SPEED_100 == phydev->speed))
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{
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val = phy_read(phydev, 1);//read status register 1,latched
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val = phy_read(phydev, 0x11);//read status register 0x11
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val = phy_read(phydev, 1);//read status register 1
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if((0 < val) && (0x4 & val)) return link_mode_8521;
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}
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}
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#endif
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return genphy_aneg_done(phydev);
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}
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static int yt8521_read_status(struct phy_device *phydev)
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{
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//int i;
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int ret;
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volatile int val, yt8521_fiber_latch_val, yt8521_fiber_curr_val;
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volatile int link;
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int link_utp = 0, link_fiber = 0;
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#if 0
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static int cnt_read_status = 0;
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struct net_device * p_tmp_netdev = phydev->attached_dev;
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if(phydev->attached_dev) {
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//printk("yzhang..phy attached to a macdev\n");
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}
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if(cnt_read_status)
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{
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cnt_read_status--;
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//printk (KERN_INFO "yzhang..8521 read status cnt=%d\n",cnt_read_status);
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if(0<cnt_read_status)
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{
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return 0;
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}
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}
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cnt_read_status = 10;
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#endif
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//printk (KERN_INFO "yzhang..8521 read status call in\n");
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#if (YT8521_PHY_MODE_CURR != YT8521_PHY_MODE_FIBER)
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/* reading UTP */
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ret = ytphy_write_ext(phydev, 0xa000, 0);
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if (ret < 0)
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return ret;
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val = phy_read(phydev, REG_PHY_SPEC_STATUS);
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if (val < 0)
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return val;
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link = val & (BIT(YT8521_LINK_STATUS_BIT));
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if (link) {
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link_utp = 1;
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link_mode_8521 = 1;
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yt8521_adjust_status(phydev, val, 1);
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} else {
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link_utp = 0;
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}
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#endif //(YT8521_PHY_MODE_CURR != YT8521_PHY_MODE_FIBER)
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#if (YT8521_PHY_MODE_CURR != YT8521_PHY_MODE_UTP)
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/* reading Fiber */
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ret = ytphy_write_ext(phydev, 0xa000, 2);
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if (ret < 0)
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return ret;
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val = phy_read(phydev, REG_PHY_SPEC_STATUS);
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if (val < 0)
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return val;
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//printk (KERN_INFO "yzhang..8521 read fiber status=%04x,macbase=0x%08lx\n", val,(unsigned long)phydev->attached_dev);
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/* for fiber, from 1000m to 100m, there is not link down from 0x11, and check reg 1 to identify such case */
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yt8521_fiber_latch_val = phy_read(phydev, MII_BMSR);
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yt8521_fiber_curr_val = phy_read(phydev, MII_BMSR);
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link = val & (BIT(YT8521_LINK_STATUS_BIT));
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if((link) && (yt8521_fiber_latch_val != yt8521_fiber_curr_val))
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{
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link = 0;
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printk (KERN_INFO "yzhang..8521 fiber link down detect,latch=%04x,curr=%04x\n", yt8521_fiber_latch_val,yt8521_fiber_curr_val);
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}
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if (link) {
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link_fiber = 1;
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yt8521_adjust_status(phydev, val, 0);
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link_mode_8521 = 32; //fiber mode
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#if 0
|
||
/* start workaround for 8521 100m fiber autoneg */
|
||
for(i = 0; i < YT8521_NUM_OF_FIBER_PHY; i++)
|
||
{
|
||
if(autoneg_phydev[i] == (unsigned long)phydev->attached_dev){
|
||
break;
|
||
}
|
||
}
|
||
//printk("yzhnag..8521 fiber workaround now is for eth%d,macbase=%#lx\n", i,autoneg_phydev[i]);
|
||
|
||
if((0 == autoneg_changed[i]) && (SPEED_100 == phydev->speed))
|
||
{
|
||
autoneg_pre_val[i] = phydev->autoneg;
|
||
autoneg_changed[i] = 1;
|
||
phydev->autoneg = AUTONEG_DISABLE;
|
||
printk("yzhang-phy workaround eth%d, fiber 100m,autoneg[pre=%d,now=%d],changed=%d\n",i,autoneg_pre_val[i],phydev->autoneg,autoneg_changed[i]);
|
||
}else if((autoneg_changed[i]) && (SPEED_100 != phydev->speed))
|
||
{
|
||
phydev->autoneg = autoneg_pre_val[i];
|
||
autoneg_changed[i] = 0;
|
||
printk("yzhang-phy workaround eth%d, fiber 1000m,restore autoneg,%d,changed=%d\n",i,phydev->autoneg,autoneg_changed[i]);
|
||
}
|
||
/*end of workaround for 8521 */
|
||
#endif
|
||
|
||
} else {
|
||
link_fiber = 0;
|
||
}
|
||
#endif //(YT8521_PHY_MODE_CURR != YT8521_PHY_MODE_UTP)
|
||
|
||
if (link_utp || link_fiber) {
|
||
phydev->link = 1;
|
||
} else {
|
||
phydev->link = 0;
|
||
link_mode_8521 = 0;
|
||
}
|
||
|
||
if (link_utp) {
|
||
ytphy_write_ext(phydev, 0xa000, 0);
|
||
}
|
||
//printk (KERN_INFO "yzhang..8521 read status call out,link=%d,linkmode=%d\n", phydev->link, link_mode_8521 );
|
||
|
||
return 0;
|
||
}
|
||
|
||
int yt8521_suspend(struct phy_device *phydev)
|
||
{
|
||
int value;
|
||
|
||
/* no need lock in 4.19 */
|
||
/* mutex_lock(&phydev->lock); */
|
||
|
||
ytphy_write_ext(phydev, 0xa000, 0);
|
||
value = phy_read(phydev, MII_BMCR);
|
||
phy_write(phydev, MII_BMCR, value | BMCR_PDOWN);
|
||
|
||
ytphy_write_ext(phydev, 0xa000, 2);
|
||
value = phy_read(phydev, MII_BMCR);
|
||
phy_write(phydev, MII_BMCR, value | BMCR_PDOWN);
|
||
|
||
ytphy_write_ext(phydev, 0xa000, 0);
|
||
|
||
/* mutex_unlock(&phydev->lock); */
|
||
|
||
return 0;
|
||
}
|
||
|
||
int yt8521_resume(struct phy_device *phydev)
|
||
{
|
||
int value;
|
||
|
||
/* no need lock in 4.19 */
|
||
/* mutex_lock(&phydev->lock); */
|
||
|
||
ytphy_write_ext(phydev, 0xa000, 0);
|
||
value = phy_read(phydev, MII_BMCR);
|
||
phy_write(phydev, MII_BMCR, value & ~BMCR_PDOWN);
|
||
|
||
ytphy_write_ext(phydev, 0xa000, 2);
|
||
value = phy_read(phydev, MII_BMCR);
|
||
phy_write(phydev, MII_BMCR, value & ~BMCR_PDOWN);
|
||
|
||
ytphy_write_ext(phydev, 0xa000, 0);
|
||
|
||
/* mutex_unlock(&phydev->lock); */
|
||
|
||
return 0;
|
||
}
|
||
|
||
static struct phy_driver ytphy_drvs[] = {
|
||
{
|
||
.phy_id = PHY_ID_YT8010,
|
||
.name = "YT8010 Automotive Ethernet",
|
||
.phy_id_mask = MOTORCOMM_PHY_ID_MASK,
|
||
.features = PHY_BASIC_FEATURES,
|
||
//.flags = PHY_HAS_INTERRUPT,
|
||
.config_aneg = yt8010_config_aneg,
|
||
//.config_init = genphy_config_init,
|
||
.read_status = genphy_read_status,
|
||
}, {
|
||
.phy_id = PHY_ID_YT8510,
|
||
.name = "YT8510 100/10Mb Ethernet",
|
||
.phy_id_mask = MOTORCOMM_PHY_ID_MASK,
|
||
.features = PHY_BASIC_FEATURES,
|
||
//.flags = PHY_HAS_INTERRUPT,
|
||
.config_aneg = genphy_config_aneg,
|
||
//.config_init = genphy_config_init,
|
||
.read_status = genphy_read_status,
|
||
}, {
|
||
.phy_id = PHY_ID_YT8511,
|
||
.name = "YT8511 Gigabit Ethernet",
|
||
.phy_id_mask = MOTORCOMM_PHY_ID_MASK,
|
||
.features = PHY_GBIT_FEATURES,
|
||
//.flags = PHY_HAS_INTERRUPT,
|
||
.config_aneg = genphy_config_aneg,
|
||
#if GMAC_CLOCK_INPUT_NEEDED
|
||
.config_init = yt8511_config_init,
|
||
#else
|
||
.config_init = genphy_config_init,
|
||
#endif
|
||
.read_status = genphy_read_status,
|
||
.suspend = genphy_suspend,
|
||
.resume = genphy_resume,
|
||
}, {
|
||
.phy_id = PHY_ID_YT8512,
|
||
.name = "YT8512 Ethernet",
|
||
.phy_id_mask = MOTORCOMM_PHY_ID_MASK,
|
||
.features = PHY_BASIC_FEATURES,
|
||
//.flags = PHY_HAS_INTERRUPT,
|
||
.config_aneg = genphy_config_aneg,
|
||
.config_init = yt8512_config_init,
|
||
.read_status = yt8512_read_status,
|
||
.suspend = genphy_suspend,
|
||
.resume = genphy_resume,
|
||
}, {
|
||
.phy_id = PHY_ID_YT8512B,
|
||
.name = "YT8512B Ethernet",
|
||
.phy_id_mask = MOTORCOMM_PHY_ID_MASK,
|
||
.features = PHY_BASIC_FEATURES,
|
||
//.flags = PHY_HAS_INTERRUPT,
|
||
.config_aneg = genphy_config_aneg,
|
||
.config_init = yt8512_config_init,
|
||
.read_status = yt8512_read_status,
|
||
.suspend = genphy_suspend,
|
||
.resume = genphy_resume,
|
||
}, {
|
||
.phy_id = PHY_ID_YT8521,
|
||
.name = "YT8521 Ethernet",
|
||
.phy_id_mask = MOTORCOMM_PHY_ID_MASK,
|
||
.features = PHY_GBIT_FEATURES,
|
||
.flags = PHY_POLL,
|
||
.soft_reset = yt8521_soft_reset,
|
||
.config_aneg = genphy_config_aneg,
|
||
.aneg_done = yt8521_aneg_done,
|
||
.config_init = yt8521_config_init,
|
||
.read_status = yt8521_read_status,
|
||
.suspend = yt8521_suspend,
|
||
.resume = yt8521_resume,
|
||
},
|
||
};
|
||
|
||
module_phy_driver(ytphy_drvs);
|
||
|
||
MODULE_DESCRIPTION("Motorcomm PHY driver");
|
||
MODULE_AUTHOR("Leilei Zhao");
|
||
MODULE_LICENSE("GPL");
|
||
|
||
static struct mdio_device_id __maybe_unused motorcomm_tbl[] = {
|
||
{ PHY_ID_YT8010, MOTORCOMM_PHY_ID_MASK },
|
||
{ PHY_ID_YT8510, MOTORCOMM_PHY_ID_MASK },
|
||
{ PHY_ID_YT8511, MOTORCOMM_PHY_ID_MASK },
|
||
{ PHY_ID_YT8512, MOTORCOMM_PHY_ID_MASK },
|
||
{ PHY_ID_YT8512B, MOTORCOMM_PHY_ID_MASK },
|
||
{ PHY_ID_YT8521, MOTORCOMM_PHY_ID_MASK },
|
||
{ }
|
||
};
|
||
|
||
MODULE_DEVICE_TABLE(mdio, motorcomm_tbl);
|
||
|