754 lines
18 KiB
C
754 lines
18 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/* Copyright(c) 2018 Intel Corporation. */
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#include <linux/bpf_trace.h>
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#include <net/xdp_sock.h>
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#include <net/xdp.h>
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#include "ixgbe.h"
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#include "ixgbe_txrx_common.h"
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struct xdp_umem *ixgbe_xsk_umem(struct ixgbe_adapter *adapter,
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struct ixgbe_ring *ring)
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{
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bool xdp_on = READ_ONCE(adapter->xdp_prog);
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int qid = ring->ring_idx;
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if (!xdp_on || !test_bit(qid, adapter->af_xdp_zc_qps))
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return NULL;
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return xdp_get_umem_from_qid(adapter->netdev, qid);
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}
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static int ixgbe_xsk_umem_dma_map(struct ixgbe_adapter *adapter,
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struct xdp_umem *umem)
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{
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struct device *dev = &adapter->pdev->dev;
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unsigned int i, j;
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dma_addr_t dma;
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for (i = 0; i < umem->npgs; i++) {
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dma = dma_map_page_attrs(dev, umem->pgs[i], 0, PAGE_SIZE,
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DMA_BIDIRECTIONAL, IXGBE_RX_DMA_ATTR);
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if (dma_mapping_error(dev, dma))
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goto out_unmap;
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umem->pages[i].dma = dma;
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}
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return 0;
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out_unmap:
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for (j = 0; j < i; j++) {
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dma_unmap_page_attrs(dev, umem->pages[i].dma, PAGE_SIZE,
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DMA_BIDIRECTIONAL, IXGBE_RX_DMA_ATTR);
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umem->pages[i].dma = 0;
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}
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return -1;
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}
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static void ixgbe_xsk_umem_dma_unmap(struct ixgbe_adapter *adapter,
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struct xdp_umem *umem)
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{
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struct device *dev = &adapter->pdev->dev;
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unsigned int i;
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for (i = 0; i < umem->npgs; i++) {
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dma_unmap_page_attrs(dev, umem->pages[i].dma, PAGE_SIZE,
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DMA_BIDIRECTIONAL, IXGBE_RX_DMA_ATTR);
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umem->pages[i].dma = 0;
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}
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}
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static int ixgbe_xsk_umem_enable(struct ixgbe_adapter *adapter,
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struct xdp_umem *umem,
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u16 qid)
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{
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struct net_device *netdev = adapter->netdev;
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struct xdp_umem_fq_reuse *reuseq;
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bool if_running;
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int err;
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if (qid >= adapter->num_rx_queues)
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return -EINVAL;
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if (qid >= netdev->real_num_rx_queues ||
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qid >= netdev->real_num_tx_queues)
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return -EINVAL;
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reuseq = xsk_reuseq_prepare(adapter->rx_ring[0]->count);
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if (!reuseq)
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return -ENOMEM;
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xsk_reuseq_free(xsk_reuseq_swap(umem, reuseq));
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err = ixgbe_xsk_umem_dma_map(adapter, umem);
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if (err)
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return err;
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if_running = netif_running(adapter->netdev) &&
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ixgbe_enabled_xdp_adapter(adapter);
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if (if_running)
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ixgbe_txrx_ring_disable(adapter, qid);
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set_bit(qid, adapter->af_xdp_zc_qps);
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if (if_running) {
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ixgbe_txrx_ring_enable(adapter, qid);
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/* Kick start the NAPI context so that receiving will start */
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err = ixgbe_xsk_wakeup(adapter->netdev, qid, XDP_WAKEUP_RX);
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if (err)
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return err;
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}
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return 0;
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}
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static int ixgbe_xsk_umem_disable(struct ixgbe_adapter *adapter, u16 qid)
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{
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struct xdp_umem *umem;
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bool if_running;
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umem = xdp_get_umem_from_qid(adapter->netdev, qid);
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if (!umem)
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return -EINVAL;
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if_running = netif_running(adapter->netdev) &&
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ixgbe_enabled_xdp_adapter(adapter);
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if (if_running)
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ixgbe_txrx_ring_disable(adapter, qid);
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clear_bit(qid, adapter->af_xdp_zc_qps);
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ixgbe_xsk_umem_dma_unmap(adapter, umem);
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if (if_running)
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ixgbe_txrx_ring_enable(adapter, qid);
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return 0;
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}
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int ixgbe_xsk_umem_setup(struct ixgbe_adapter *adapter, struct xdp_umem *umem,
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u16 qid)
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{
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return umem ? ixgbe_xsk_umem_enable(adapter, umem, qid) :
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ixgbe_xsk_umem_disable(adapter, qid);
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}
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static int ixgbe_run_xdp_zc(struct ixgbe_adapter *adapter,
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struct ixgbe_ring *rx_ring,
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struct xdp_buff *xdp)
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{
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struct xdp_umem *umem = rx_ring->xsk_umem;
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int err, result = IXGBE_XDP_PASS;
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struct bpf_prog *xdp_prog;
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struct xdp_frame *xdpf;
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u64 offset;
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u32 act;
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rcu_read_lock();
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xdp_prog = READ_ONCE(rx_ring->xdp_prog);
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act = bpf_prog_run_xdp(xdp_prog, xdp);
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offset = xdp->data - xdp->data_hard_start;
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xdp->handle = xsk_umem_adjust_offset(umem, xdp->handle, offset);
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switch (act) {
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case XDP_PASS:
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break;
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case XDP_TX:
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xdpf = convert_to_xdp_frame(xdp);
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if (unlikely(!xdpf)) {
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result = IXGBE_XDP_CONSUMED;
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break;
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}
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result = ixgbe_xmit_xdp_ring(adapter, xdpf);
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break;
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case XDP_REDIRECT:
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err = xdp_do_redirect(rx_ring->netdev, xdp, xdp_prog);
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result = !err ? IXGBE_XDP_REDIR : IXGBE_XDP_CONSUMED;
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break;
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default:
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bpf_warn_invalid_xdp_action(act);
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/* fallthrough */
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case XDP_ABORTED:
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trace_xdp_exception(rx_ring->netdev, xdp_prog, act);
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/* fallthrough -- handle aborts by dropping packet */
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case XDP_DROP:
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result = IXGBE_XDP_CONSUMED;
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break;
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}
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rcu_read_unlock();
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return result;
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}
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static struct
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ixgbe_rx_buffer *ixgbe_get_rx_buffer_zc(struct ixgbe_ring *rx_ring,
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unsigned int size)
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{
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struct ixgbe_rx_buffer *bi;
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bi = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
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/* we are reusing so sync this buffer for CPU use */
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dma_sync_single_range_for_cpu(rx_ring->dev,
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bi->dma, 0,
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size,
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DMA_BIDIRECTIONAL);
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return bi;
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}
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static void ixgbe_reuse_rx_buffer_zc(struct ixgbe_ring *rx_ring,
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struct ixgbe_rx_buffer *obi)
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{
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u16 nta = rx_ring->next_to_alloc;
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struct ixgbe_rx_buffer *nbi;
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nbi = &rx_ring->rx_buffer_info[rx_ring->next_to_alloc];
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/* update, and store next to alloc */
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nta++;
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rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
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/* transfer page from old buffer to new buffer */
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nbi->dma = obi->dma;
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nbi->addr = obi->addr;
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nbi->handle = obi->handle;
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obi->addr = NULL;
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obi->skb = NULL;
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}
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void ixgbe_zca_free(struct zero_copy_allocator *alloc, unsigned long handle)
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{
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struct ixgbe_rx_buffer *bi;
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struct ixgbe_ring *rx_ring;
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u64 hr, mask;
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u16 nta;
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rx_ring = container_of(alloc, struct ixgbe_ring, zca);
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hr = rx_ring->xsk_umem->headroom + XDP_PACKET_HEADROOM;
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mask = rx_ring->xsk_umem->chunk_mask;
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nta = rx_ring->next_to_alloc;
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bi = rx_ring->rx_buffer_info;
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nta++;
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rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
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handle &= mask;
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bi->dma = xdp_umem_get_dma(rx_ring->xsk_umem, handle);
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bi->dma += hr;
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bi->addr = xdp_umem_get_data(rx_ring->xsk_umem, handle);
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bi->addr += hr;
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bi->handle = xsk_umem_adjust_offset(rx_ring->xsk_umem, (u64)handle,
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rx_ring->xsk_umem->headroom);
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}
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static bool ixgbe_alloc_buffer_zc(struct ixgbe_ring *rx_ring,
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struct ixgbe_rx_buffer *bi)
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{
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struct xdp_umem *umem = rx_ring->xsk_umem;
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void *addr = bi->addr;
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u64 handle, hr;
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if (addr)
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return true;
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if (!xsk_umem_peek_addr(umem, &handle)) {
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rx_ring->rx_stats.alloc_rx_page_failed++;
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return false;
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}
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hr = umem->headroom + XDP_PACKET_HEADROOM;
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bi->dma = xdp_umem_get_dma(umem, handle);
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bi->dma += hr;
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bi->addr = xdp_umem_get_data(umem, handle);
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bi->addr += hr;
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bi->handle = xsk_umem_adjust_offset(umem, handle, umem->headroom);
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xsk_umem_discard_addr(umem);
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return true;
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}
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static bool ixgbe_alloc_buffer_slow_zc(struct ixgbe_ring *rx_ring,
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struct ixgbe_rx_buffer *bi)
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{
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struct xdp_umem *umem = rx_ring->xsk_umem;
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u64 handle, hr;
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if (!xsk_umem_peek_addr_rq(umem, &handle)) {
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rx_ring->rx_stats.alloc_rx_page_failed++;
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return false;
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}
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handle &= rx_ring->xsk_umem->chunk_mask;
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hr = umem->headroom + XDP_PACKET_HEADROOM;
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bi->dma = xdp_umem_get_dma(umem, handle);
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bi->dma += hr;
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bi->addr = xdp_umem_get_data(umem, handle);
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bi->addr += hr;
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bi->handle = xsk_umem_adjust_offset(umem, handle, umem->headroom);
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xsk_umem_discard_addr_rq(umem);
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return true;
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}
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static __always_inline bool
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__ixgbe_alloc_rx_buffers_zc(struct ixgbe_ring *rx_ring, u16 cleaned_count,
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bool alloc(struct ixgbe_ring *rx_ring,
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struct ixgbe_rx_buffer *bi))
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{
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union ixgbe_adv_rx_desc *rx_desc;
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struct ixgbe_rx_buffer *bi;
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u16 i = rx_ring->next_to_use;
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bool ok = true;
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/* nothing to do */
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if (!cleaned_count)
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return true;
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rx_desc = IXGBE_RX_DESC(rx_ring, i);
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bi = &rx_ring->rx_buffer_info[i];
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i -= rx_ring->count;
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do {
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if (!alloc(rx_ring, bi)) {
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ok = false;
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break;
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}
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/* sync the buffer for use by the device */
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dma_sync_single_range_for_device(rx_ring->dev, bi->dma,
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bi->page_offset,
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rx_ring->rx_buf_len,
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DMA_BIDIRECTIONAL);
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/* Refresh the desc even if buffer_addrs didn't change
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* because each write-back erases this info.
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*/
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rx_desc->read.pkt_addr = cpu_to_le64(bi->dma);
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rx_desc++;
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bi++;
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i++;
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if (unlikely(!i)) {
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rx_desc = IXGBE_RX_DESC(rx_ring, 0);
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bi = rx_ring->rx_buffer_info;
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i -= rx_ring->count;
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}
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/* clear the length for the next_to_use descriptor */
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rx_desc->wb.upper.length = 0;
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cleaned_count--;
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} while (cleaned_count);
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i += rx_ring->count;
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if (rx_ring->next_to_use != i) {
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rx_ring->next_to_use = i;
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/* update next to alloc since we have filled the ring */
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rx_ring->next_to_alloc = i;
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/* Force memory writes to complete before letting h/w
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* know there are new descriptors to fetch. (Only
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* applicable for weak-ordered memory model archs,
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* such as IA-64).
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*/
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wmb();
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writel(i, rx_ring->tail);
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}
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return ok;
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}
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void ixgbe_alloc_rx_buffers_zc(struct ixgbe_ring *rx_ring, u16 count)
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{
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__ixgbe_alloc_rx_buffers_zc(rx_ring, count,
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ixgbe_alloc_buffer_slow_zc);
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}
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static bool ixgbe_alloc_rx_buffers_fast_zc(struct ixgbe_ring *rx_ring,
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u16 count)
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{
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return __ixgbe_alloc_rx_buffers_zc(rx_ring, count,
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ixgbe_alloc_buffer_zc);
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}
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static struct sk_buff *ixgbe_construct_skb_zc(struct ixgbe_ring *rx_ring,
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struct ixgbe_rx_buffer *bi,
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struct xdp_buff *xdp)
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{
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unsigned int metasize = xdp->data - xdp->data_meta;
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unsigned int datasize = xdp->data_end - xdp->data;
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struct sk_buff *skb;
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/* allocate a skb to store the frags */
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skb = __napi_alloc_skb(&rx_ring->q_vector->napi,
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xdp->data_end - xdp->data_hard_start,
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GFP_ATOMIC | __GFP_NOWARN);
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if (unlikely(!skb))
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return NULL;
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skb_reserve(skb, xdp->data - xdp->data_hard_start);
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memcpy(__skb_put(skb, datasize), xdp->data, datasize);
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if (metasize)
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skb_metadata_set(skb, metasize);
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ixgbe_reuse_rx_buffer_zc(rx_ring, bi);
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return skb;
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}
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static void ixgbe_inc_ntc(struct ixgbe_ring *rx_ring)
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{
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u32 ntc = rx_ring->next_to_clean + 1;
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ntc = (ntc < rx_ring->count) ? ntc : 0;
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rx_ring->next_to_clean = ntc;
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prefetch(IXGBE_RX_DESC(rx_ring, ntc));
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}
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int ixgbe_clean_rx_irq_zc(struct ixgbe_q_vector *q_vector,
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struct ixgbe_ring *rx_ring,
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const int budget)
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{
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unsigned int total_rx_bytes = 0, total_rx_packets = 0;
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struct ixgbe_adapter *adapter = q_vector->adapter;
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u16 cleaned_count = ixgbe_desc_unused(rx_ring);
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unsigned int xdp_res, xdp_xmit = 0;
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bool failure = false;
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struct sk_buff *skb;
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struct xdp_buff xdp;
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xdp.rxq = &rx_ring->xdp_rxq;
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while (likely(total_rx_packets < budget)) {
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union ixgbe_adv_rx_desc *rx_desc;
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struct ixgbe_rx_buffer *bi;
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unsigned int size;
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/* return some buffers to hardware, one at a time is too slow */
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if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
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failure = failure ||
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!ixgbe_alloc_rx_buffers_fast_zc(rx_ring,
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cleaned_count);
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cleaned_count = 0;
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}
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rx_desc = IXGBE_RX_DESC(rx_ring, rx_ring->next_to_clean);
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size = le16_to_cpu(rx_desc->wb.upper.length);
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if (!size)
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break;
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/* This memory barrier is needed to keep us from reading
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* any other fields out of the rx_desc until we know the
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* descriptor has been written back
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*/
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dma_rmb();
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bi = ixgbe_get_rx_buffer_zc(rx_ring, size);
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if (unlikely(!ixgbe_test_staterr(rx_desc,
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IXGBE_RXD_STAT_EOP))) {
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struct ixgbe_rx_buffer *next_bi;
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ixgbe_reuse_rx_buffer_zc(rx_ring, bi);
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ixgbe_inc_ntc(rx_ring);
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next_bi =
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&rx_ring->rx_buffer_info[rx_ring->next_to_clean];
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next_bi->skb = ERR_PTR(-EINVAL);
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continue;
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}
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if (unlikely(bi->skb)) {
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ixgbe_reuse_rx_buffer_zc(rx_ring, bi);
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ixgbe_inc_ntc(rx_ring);
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continue;
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}
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xdp.data = bi->addr;
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xdp.data_meta = xdp.data;
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xdp.data_hard_start = xdp.data - XDP_PACKET_HEADROOM;
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xdp.data_end = xdp.data + size;
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xdp.handle = bi->handle;
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xdp_res = ixgbe_run_xdp_zc(adapter, rx_ring, &xdp);
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if (xdp_res) {
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if (xdp_res & (IXGBE_XDP_TX | IXGBE_XDP_REDIR)) {
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xdp_xmit |= xdp_res;
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bi->addr = NULL;
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bi->skb = NULL;
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} else {
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ixgbe_reuse_rx_buffer_zc(rx_ring, bi);
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}
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total_rx_packets++;
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total_rx_bytes += size;
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|
cleaned_count++;
|
|
ixgbe_inc_ntc(rx_ring);
|
|
continue;
|
|
}
|
|
|
|
/* XDP_PASS path */
|
|
skb = ixgbe_construct_skb_zc(rx_ring, bi, &xdp);
|
|
if (!skb) {
|
|
rx_ring->rx_stats.alloc_rx_buff_failed++;
|
|
break;
|
|
}
|
|
|
|
cleaned_count++;
|
|
ixgbe_inc_ntc(rx_ring);
|
|
|
|
if (eth_skb_pad(skb))
|
|
continue;
|
|
|
|
total_rx_bytes += skb->len;
|
|
total_rx_packets++;
|
|
|
|
ixgbe_process_skb_fields(rx_ring, rx_desc, skb);
|
|
ixgbe_rx_skb(q_vector, skb);
|
|
}
|
|
|
|
if (xdp_xmit & IXGBE_XDP_REDIR)
|
|
xdp_do_flush_map();
|
|
|
|
if (xdp_xmit & IXGBE_XDP_TX) {
|
|
struct ixgbe_ring *ring = adapter->xdp_ring[smp_processor_id()];
|
|
|
|
/* Force memory writes to complete before letting h/w
|
|
* know there are new descriptors to fetch.
|
|
*/
|
|
wmb();
|
|
writel(ring->next_to_use, ring->tail);
|
|
}
|
|
|
|
u64_stats_update_begin(&rx_ring->syncp);
|
|
rx_ring->stats.packets += total_rx_packets;
|
|
rx_ring->stats.bytes += total_rx_bytes;
|
|
u64_stats_update_end(&rx_ring->syncp);
|
|
q_vector->rx.total_packets += total_rx_packets;
|
|
q_vector->rx.total_bytes += total_rx_bytes;
|
|
|
|
if (xsk_umem_uses_need_wakeup(rx_ring->xsk_umem)) {
|
|
if (failure || rx_ring->next_to_clean == rx_ring->next_to_use)
|
|
xsk_set_rx_need_wakeup(rx_ring->xsk_umem);
|
|
else
|
|
xsk_clear_rx_need_wakeup(rx_ring->xsk_umem);
|
|
|
|
return (int)total_rx_packets;
|
|
}
|
|
return failure ? budget : (int)total_rx_packets;
|
|
}
|
|
|
|
void ixgbe_xsk_clean_rx_ring(struct ixgbe_ring *rx_ring)
|
|
{
|
|
u16 i = rx_ring->next_to_clean;
|
|
struct ixgbe_rx_buffer *bi = &rx_ring->rx_buffer_info[i];
|
|
|
|
while (i != rx_ring->next_to_alloc) {
|
|
xsk_umem_fq_reuse(rx_ring->xsk_umem, bi->handle);
|
|
i++;
|
|
bi++;
|
|
if (i == rx_ring->count) {
|
|
i = 0;
|
|
bi = rx_ring->rx_buffer_info;
|
|
}
|
|
}
|
|
}
|
|
|
|
static bool ixgbe_xmit_zc(struct ixgbe_ring *xdp_ring, unsigned int budget)
|
|
{
|
|
union ixgbe_adv_tx_desc *tx_desc = NULL;
|
|
struct ixgbe_tx_buffer *tx_bi;
|
|
bool work_done = true;
|
|
struct xdp_desc desc;
|
|
dma_addr_t dma;
|
|
u32 cmd_type;
|
|
|
|
while (budget-- > 0) {
|
|
if (unlikely(!ixgbe_desc_unused(xdp_ring)) ||
|
|
!netif_carrier_ok(xdp_ring->netdev)) {
|
|
work_done = false;
|
|
break;
|
|
}
|
|
|
|
if (!xsk_umem_consume_tx(xdp_ring->xsk_umem, &desc))
|
|
break;
|
|
|
|
dma = xdp_umem_get_dma(xdp_ring->xsk_umem, desc.addr);
|
|
|
|
dma_sync_single_for_device(xdp_ring->dev, dma, desc.len,
|
|
DMA_BIDIRECTIONAL);
|
|
|
|
tx_bi = &xdp_ring->tx_buffer_info[xdp_ring->next_to_use];
|
|
tx_bi->bytecount = desc.len;
|
|
tx_bi->xdpf = NULL;
|
|
tx_bi->gso_segs = 1;
|
|
|
|
tx_desc = IXGBE_TX_DESC(xdp_ring, xdp_ring->next_to_use);
|
|
tx_desc->read.buffer_addr = cpu_to_le64(dma);
|
|
|
|
/* put descriptor type bits */
|
|
cmd_type = IXGBE_ADVTXD_DTYP_DATA |
|
|
IXGBE_ADVTXD_DCMD_DEXT |
|
|
IXGBE_ADVTXD_DCMD_IFCS;
|
|
cmd_type |= desc.len | IXGBE_TXD_CMD;
|
|
tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
|
|
tx_desc->read.olinfo_status =
|
|
cpu_to_le32(desc.len << IXGBE_ADVTXD_PAYLEN_SHIFT);
|
|
|
|
xdp_ring->next_to_use++;
|
|
if (xdp_ring->next_to_use == xdp_ring->count)
|
|
xdp_ring->next_to_use = 0;
|
|
}
|
|
|
|
if (tx_desc) {
|
|
ixgbe_xdp_ring_update_tail(xdp_ring);
|
|
xsk_umem_consume_tx_done(xdp_ring->xsk_umem);
|
|
}
|
|
|
|
return !!budget && work_done;
|
|
}
|
|
|
|
static void ixgbe_clean_xdp_tx_buffer(struct ixgbe_ring *tx_ring,
|
|
struct ixgbe_tx_buffer *tx_bi)
|
|
{
|
|
xdp_return_frame(tx_bi->xdpf);
|
|
dma_unmap_single(tx_ring->dev,
|
|
dma_unmap_addr(tx_bi, dma),
|
|
dma_unmap_len(tx_bi, len), DMA_TO_DEVICE);
|
|
dma_unmap_len_set(tx_bi, len, 0);
|
|
}
|
|
|
|
bool ixgbe_clean_xdp_tx_irq(struct ixgbe_q_vector *q_vector,
|
|
struct ixgbe_ring *tx_ring, int napi_budget)
|
|
{
|
|
u16 ntc = tx_ring->next_to_clean, ntu = tx_ring->next_to_use;
|
|
unsigned int total_packets = 0, total_bytes = 0;
|
|
struct xdp_umem *umem = tx_ring->xsk_umem;
|
|
union ixgbe_adv_tx_desc *tx_desc;
|
|
struct ixgbe_tx_buffer *tx_bi;
|
|
u32 xsk_frames = 0;
|
|
|
|
tx_bi = &tx_ring->tx_buffer_info[ntc];
|
|
tx_desc = IXGBE_TX_DESC(tx_ring, ntc);
|
|
|
|
while (ntc != ntu) {
|
|
if (!(tx_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
|
|
break;
|
|
|
|
total_bytes += tx_bi->bytecount;
|
|
total_packets += tx_bi->gso_segs;
|
|
|
|
if (tx_bi->xdpf)
|
|
ixgbe_clean_xdp_tx_buffer(tx_ring, tx_bi);
|
|
else
|
|
xsk_frames++;
|
|
|
|
tx_bi->xdpf = NULL;
|
|
|
|
tx_bi++;
|
|
tx_desc++;
|
|
ntc++;
|
|
if (unlikely(ntc == tx_ring->count)) {
|
|
ntc = 0;
|
|
tx_bi = tx_ring->tx_buffer_info;
|
|
tx_desc = IXGBE_TX_DESC(tx_ring, 0);
|
|
}
|
|
|
|
/* issue prefetch for next Tx descriptor */
|
|
prefetch(tx_desc);
|
|
}
|
|
|
|
tx_ring->next_to_clean = ntc;
|
|
|
|
u64_stats_update_begin(&tx_ring->syncp);
|
|
tx_ring->stats.bytes += total_bytes;
|
|
tx_ring->stats.packets += total_packets;
|
|
u64_stats_update_end(&tx_ring->syncp);
|
|
q_vector->tx.total_bytes += total_bytes;
|
|
q_vector->tx.total_packets += total_packets;
|
|
|
|
if (xsk_frames)
|
|
xsk_umem_complete_tx(umem, xsk_frames);
|
|
|
|
if (xsk_umem_uses_need_wakeup(tx_ring->xsk_umem))
|
|
xsk_set_tx_need_wakeup(tx_ring->xsk_umem);
|
|
|
|
return ixgbe_xmit_zc(tx_ring, q_vector->tx.work_limit);
|
|
}
|
|
|
|
int ixgbe_xsk_wakeup(struct net_device *dev, u32 qid, u32 flags)
|
|
{
|
|
struct ixgbe_adapter *adapter = netdev_priv(dev);
|
|
struct ixgbe_ring *ring;
|
|
|
|
if (test_bit(__IXGBE_DOWN, &adapter->state))
|
|
return -ENETDOWN;
|
|
|
|
if (!READ_ONCE(adapter->xdp_prog))
|
|
return -ENXIO;
|
|
|
|
if (qid >= adapter->num_xdp_queues)
|
|
return -ENXIO;
|
|
|
|
ring = adapter->xdp_ring[qid];
|
|
|
|
if (test_bit(__IXGBE_TX_DISABLED, &ring->state))
|
|
return -ENETDOWN;
|
|
|
|
if (!ring->xsk_umem)
|
|
return -ENXIO;
|
|
|
|
if (!napi_if_scheduled_mark_missed(&ring->q_vector->napi)) {
|
|
u64 eics = BIT_ULL(ring->q_vector->v_idx);
|
|
|
|
ixgbe_irq_rearm_queues(adapter, eics);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
void ixgbe_xsk_clean_tx_ring(struct ixgbe_ring *tx_ring)
|
|
{
|
|
u16 ntc = tx_ring->next_to_clean, ntu = tx_ring->next_to_use;
|
|
struct xdp_umem *umem = tx_ring->xsk_umem;
|
|
struct ixgbe_tx_buffer *tx_bi;
|
|
u32 xsk_frames = 0;
|
|
|
|
while (ntc != ntu) {
|
|
tx_bi = &tx_ring->tx_buffer_info[ntc];
|
|
|
|
if (tx_bi->xdpf)
|
|
ixgbe_clean_xdp_tx_buffer(tx_ring, tx_bi);
|
|
else
|
|
xsk_frames++;
|
|
|
|
tx_bi->xdpf = NULL;
|
|
|
|
ntc++;
|
|
if (ntc == tx_ring->count)
|
|
ntc = 0;
|
|
}
|
|
|
|
if (xsk_frames)
|
|
xsk_umem_complete_tx(umem, xsk_frames);
|
|
}
|