589 lines
12 KiB
C
589 lines
12 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Huawei HiNIC PCI Express Linux driver
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* Copyright(c) 2017 Huawei Technologies Co., Ltd
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*/
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#ifndef HINIC_PORT_H
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#define HINIC_PORT_H
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#include <linux/types.h>
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#include <linux/etherdevice.h>
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#include <linux/bitops.h>
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#include "hinic_dev.h"
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#define HINIC_RSS_KEY_SIZE 40
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#define HINIC_RSS_INDIR_SIZE 256
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#define HINIC_PORT_STATS_VERSION 0
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#define HINIC_FW_VERSION_NAME 16
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#define HINIC_COMPILE_TIME_LEN 20
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#define HINIC_MGMT_VERSION_MAX_LEN 32
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struct hinic_version_info {
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u8 status;
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u8 version;
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u8 rsvd[6];
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u8 ver[HINIC_FW_VERSION_NAME];
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u8 time[HINIC_COMPILE_TIME_LEN];
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};
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enum hinic_rx_mode {
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HINIC_RX_MODE_UC = BIT(0),
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HINIC_RX_MODE_MC = BIT(1),
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HINIC_RX_MODE_BC = BIT(2),
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HINIC_RX_MODE_MC_ALL = BIT(3),
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HINIC_RX_MODE_PROMISC = BIT(4),
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};
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enum hinic_port_link_state {
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HINIC_LINK_STATE_DOWN,
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HINIC_LINK_STATE_UP,
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};
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enum hinic_port_state {
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HINIC_PORT_DISABLE = 0,
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HINIC_PORT_ENABLE = 3,
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};
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enum hinic_func_port_state {
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HINIC_FUNC_PORT_DISABLE = 0,
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HINIC_FUNC_PORT_ENABLE = 2,
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};
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enum hinic_autoneg_cap {
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HINIC_AUTONEG_UNSUPPORTED,
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HINIC_AUTONEG_SUPPORTED,
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};
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enum hinic_autoneg_state {
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HINIC_AUTONEG_DISABLED,
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HINIC_AUTONEG_ACTIVE,
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};
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enum hinic_duplex {
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HINIC_DUPLEX_HALF,
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HINIC_DUPLEX_FULL,
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};
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enum hinic_speed {
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HINIC_SPEED_10MB_LINK = 0,
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HINIC_SPEED_100MB_LINK,
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HINIC_SPEED_1000MB_LINK,
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HINIC_SPEED_10GB_LINK,
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HINIC_SPEED_25GB_LINK,
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HINIC_SPEED_40GB_LINK,
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HINIC_SPEED_100GB_LINK,
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HINIC_SPEED_UNKNOWN = 0xFF,
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};
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enum hinic_tso_state {
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HINIC_TSO_DISABLE = 0,
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HINIC_TSO_ENABLE = 1,
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};
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struct hinic_port_mac_cmd {
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u8 status;
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u8 version;
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u8 rsvd0[6];
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u16 func_idx;
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u16 vlan_id;
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u16 rsvd1;
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unsigned char mac[ETH_ALEN];
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};
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struct hinic_port_mtu_cmd {
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u8 status;
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u8 version;
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u8 rsvd0[6];
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u16 func_idx;
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u16 rsvd1;
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u32 mtu;
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};
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struct hinic_port_vlan_cmd {
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u8 status;
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u8 version;
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u8 rsvd0[6];
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u16 func_idx;
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u16 vlan_id;
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};
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struct hinic_port_rx_mode_cmd {
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u8 status;
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u8 version;
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u8 rsvd0[6];
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u16 func_idx;
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u16 rsvd;
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u32 rx_mode;
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};
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struct hinic_port_link_cmd {
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u8 status;
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u8 version;
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u8 rsvd0[6];
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u16 func_idx;
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u8 state;
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u8 rsvd1;
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};
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struct hinic_port_state_cmd {
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u8 status;
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u8 version;
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u8 rsvd0[6];
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u8 state;
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u8 rsvd1[3];
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};
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struct hinic_port_link_status {
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u8 status;
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u8 version;
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u8 rsvd0[6];
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u16 rsvd1;
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u8 link;
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u8 rsvd2;
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};
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struct hinic_port_func_state_cmd {
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u8 status;
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u8 version;
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u8 rsvd0[6];
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u16 func_idx;
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u16 rsvd1;
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u8 state;
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u8 rsvd2[3];
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};
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struct hinic_port_cap {
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u8 status;
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u8 version;
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u8 rsvd0[6];
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u16 func_idx;
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u16 rsvd1;
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u8 port_type;
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u8 autoneg_cap;
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u8 autoneg_state;
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u8 duplex;
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u8 speed;
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u8 rsvd2[3];
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};
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struct hinic_tso_config {
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u8 status;
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u8 version;
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u8 rsvd0[6];
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u16 func_id;
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u16 rsvd1;
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u8 tso_en;
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u8 resv2[3];
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};
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struct hinic_checksum_offload {
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u8 status;
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u8 version;
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u8 rsvd0[6];
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u16 func_id;
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u16 rsvd1;
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u32 rx_csum_offload;
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};
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struct hinic_rq_num {
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u8 status;
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u8 version;
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u8 rsvd0[6];
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u16 func_id;
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u16 rsvd1[33];
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u32 num_rqs;
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u32 rq_depth;
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};
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struct hinic_lro_config {
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u8 status;
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u8 version;
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u8 rsvd0[6];
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u16 func_id;
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u16 rsvd1;
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u8 lro_ipv4_en;
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u8 lro_ipv6_en;
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u8 lro_max_wqe_num;
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u8 resv2[13];
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};
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struct hinic_lro_timer {
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u8 status;
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u8 version;
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u8 rsvd0[6];
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u8 type; /* 0: set timer value, 1: get timer value */
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u8 enable; /* when set lro time, enable should be 1 */
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u16 rsvd1;
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u32 timer;
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};
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struct hinic_vlan_cfg {
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u8 status;
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u8 version;
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u8 rsvd0[6];
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u16 func_id;
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u8 vlan_rx_offload;
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u8 rsvd1[5];
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};
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struct hinic_rss_template_mgmt {
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u8 status;
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u8 version;
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u8 rsvd0[6];
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u16 func_id;
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u8 cmd;
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u8 template_id;
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u8 rsvd1[4];
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};
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struct hinic_rss_template_key {
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u8 status;
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u8 version;
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u8 rsvd0[6];
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u16 func_id;
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u8 template_id;
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u8 rsvd1;
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u8 key[HINIC_RSS_KEY_SIZE];
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};
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struct hinic_rss_context_tbl {
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u32 group_index;
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u32 offset;
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u32 size;
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u32 rsvd;
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u32 ctx;
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};
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struct hinic_rss_context_table {
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u8 status;
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u8 version;
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u8 rsvd0[6];
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u16 func_id;
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u8 template_id;
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u8 rsvd1;
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u32 context;
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};
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struct hinic_rss_indirect_tbl {
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u32 group_index;
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u32 offset;
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u32 size;
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u32 rsvd;
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u8 entry[HINIC_RSS_INDIR_SIZE];
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};
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struct hinic_rss_indir_table {
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u8 status;
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u8 version;
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u8 rsvd0[6];
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u16 func_id;
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u8 template_id;
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u8 rsvd1;
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u8 indir[HINIC_RSS_INDIR_SIZE];
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};
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struct hinic_rss_key {
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u8 status;
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u8 version;
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u8 rsvd0[6];
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u16 func_id;
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u8 template_id;
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u8 rsvd1;
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u8 key[HINIC_RSS_KEY_SIZE];
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};
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struct hinic_rss_engine_type {
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u8 status;
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u8 version;
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u8 rsvd0[6];
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u16 func_id;
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u8 template_id;
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u8 hash_engine;
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u8 rsvd1[4];
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};
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struct hinic_rss_config {
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u8 status;
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u8 version;
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u8 rsvd0[6];
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u16 func_id;
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u8 rss_en;
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u8 template_id;
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u8 rq_priority_number;
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u8 rsvd1[11];
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};
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struct hinic_stats {
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char name[ETH_GSTRING_LEN];
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u32 size;
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int offset;
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};
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struct hinic_vport_stats {
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u64 tx_unicast_pkts_vport;
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u64 tx_unicast_bytes_vport;
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u64 tx_multicast_pkts_vport;
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u64 tx_multicast_bytes_vport;
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u64 tx_broadcast_pkts_vport;
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u64 tx_broadcast_bytes_vport;
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u64 rx_unicast_pkts_vport;
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u64 rx_unicast_bytes_vport;
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u64 rx_multicast_pkts_vport;
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u64 rx_multicast_bytes_vport;
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u64 rx_broadcast_pkts_vport;
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u64 rx_broadcast_bytes_vport;
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u64 tx_discard_vport;
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u64 rx_discard_vport;
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u64 tx_err_vport;
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u64 rx_err_vport;
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};
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struct hinic_phy_port_stats {
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u64 mac_rx_total_pkt_num;
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u64 mac_rx_total_oct_num;
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u64 mac_rx_bad_pkt_num;
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u64 mac_rx_bad_oct_num;
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u64 mac_rx_good_pkt_num;
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u64 mac_rx_good_oct_num;
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u64 mac_rx_uni_pkt_num;
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u64 mac_rx_multi_pkt_num;
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u64 mac_rx_broad_pkt_num;
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u64 mac_tx_total_pkt_num;
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u64 mac_tx_total_oct_num;
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u64 mac_tx_bad_pkt_num;
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u64 mac_tx_bad_oct_num;
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u64 mac_tx_good_pkt_num;
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u64 mac_tx_good_oct_num;
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u64 mac_tx_uni_pkt_num;
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u64 mac_tx_multi_pkt_num;
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u64 mac_tx_broad_pkt_num;
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u64 mac_rx_fragment_pkt_num;
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u64 mac_rx_undersize_pkt_num;
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u64 mac_rx_undermin_pkt_num;
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u64 mac_rx_64_oct_pkt_num;
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u64 mac_rx_65_127_oct_pkt_num;
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u64 mac_rx_128_255_oct_pkt_num;
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u64 mac_rx_256_511_oct_pkt_num;
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u64 mac_rx_512_1023_oct_pkt_num;
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u64 mac_rx_1024_1518_oct_pkt_num;
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u64 mac_rx_1519_2047_oct_pkt_num;
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u64 mac_rx_2048_4095_oct_pkt_num;
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u64 mac_rx_4096_8191_oct_pkt_num;
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u64 mac_rx_8192_9216_oct_pkt_num;
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u64 mac_rx_9217_12287_oct_pkt_num;
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u64 mac_rx_12288_16383_oct_pkt_num;
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u64 mac_rx_1519_max_bad_pkt_num;
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u64 mac_rx_1519_max_good_pkt_num;
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u64 mac_rx_oversize_pkt_num;
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u64 mac_rx_jabber_pkt_num;
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u64 mac_rx_pause_num;
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u64 mac_rx_pfc_pkt_num;
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u64 mac_rx_pfc_pri0_pkt_num;
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u64 mac_rx_pfc_pri1_pkt_num;
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u64 mac_rx_pfc_pri2_pkt_num;
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u64 mac_rx_pfc_pri3_pkt_num;
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u64 mac_rx_pfc_pri4_pkt_num;
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u64 mac_rx_pfc_pri5_pkt_num;
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u64 mac_rx_pfc_pri6_pkt_num;
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u64 mac_rx_pfc_pri7_pkt_num;
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u64 mac_rx_control_pkt_num;
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u64 mac_rx_y1731_pkt_num;
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u64 mac_rx_sym_err_pkt_num;
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u64 mac_rx_fcs_err_pkt_num;
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u64 mac_rx_send_app_good_pkt_num;
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u64 mac_rx_send_app_bad_pkt_num;
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u64 mac_tx_fragment_pkt_num;
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u64 mac_tx_undersize_pkt_num;
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u64 mac_tx_undermin_pkt_num;
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u64 mac_tx_64_oct_pkt_num;
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u64 mac_tx_65_127_oct_pkt_num;
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u64 mac_tx_128_255_oct_pkt_num;
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u64 mac_tx_256_511_oct_pkt_num;
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u64 mac_tx_512_1023_oct_pkt_num;
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u64 mac_tx_1024_1518_oct_pkt_num;
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u64 mac_tx_1519_2047_oct_pkt_num;
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u64 mac_tx_2048_4095_oct_pkt_num;
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u64 mac_tx_4096_8191_oct_pkt_num;
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u64 mac_tx_8192_9216_oct_pkt_num;
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u64 mac_tx_9217_12287_oct_pkt_num;
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u64 mac_tx_12288_16383_oct_pkt_num;
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u64 mac_tx_1519_max_bad_pkt_num;
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u64 mac_tx_1519_max_good_pkt_num;
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u64 mac_tx_oversize_pkt_num;
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u64 mac_tx_jabber_pkt_num;
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u64 mac_tx_pause_num;
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u64 mac_tx_pfc_pkt_num;
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u64 mac_tx_pfc_pri0_pkt_num;
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u64 mac_tx_pfc_pri1_pkt_num;
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u64 mac_tx_pfc_pri2_pkt_num;
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u64 mac_tx_pfc_pri3_pkt_num;
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u64 mac_tx_pfc_pri4_pkt_num;
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u64 mac_tx_pfc_pri5_pkt_num;
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u64 mac_tx_pfc_pri6_pkt_num;
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u64 mac_tx_pfc_pri7_pkt_num;
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u64 mac_tx_control_pkt_num;
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u64 mac_tx_y1731_pkt_num;
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u64 mac_tx_1588_pkt_num;
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u64 mac_tx_err_all_pkt_num;
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u64 mac_tx_from_app_good_pkt_num;
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u64 mac_tx_from_app_bad_pkt_num;
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u64 mac_rx_higig2_ext_pkt_num;
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u64 mac_rx_higig2_message_pkt_num;
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u64 mac_rx_higig2_error_pkt_num;
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u64 mac_rx_higig2_cpu_ctrl_pkt_num;
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u64 mac_rx_higig2_unicast_pkt_num;
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u64 mac_rx_higig2_broadcast_pkt_num;
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u64 mac_rx_higig2_l2_multicast_pkt_num;
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u64 mac_rx_higig2_l3_multicast_pkt_num;
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u64 mac_tx_higig2_message_pkt_num;
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u64 mac_tx_higig2_ext_pkt_num;
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u64 mac_tx_higig2_cpu_ctrl_pkt_num;
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u64 mac_tx_higig2_unicast_pkt_num;
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u64 mac_tx_higig2_broadcast_pkt_num;
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u64 mac_tx_higig2_l2_multicast_pkt_num;
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u64 mac_tx_higig2_l3_multicast_pkt_num;
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};
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struct hinic_port_stats_info {
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u8 status;
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u8 version;
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u8 rsvd0[6];
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u16 func_id;
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u16 rsvd1;
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u32 stats_version;
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u32 stats_size;
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};
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struct hinic_port_stats {
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u8 status;
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u8 version;
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u8 rsvd[6];
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struct hinic_phy_port_stats stats;
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};
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struct hinic_cmd_vport_stats {
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u8 status;
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u8 version;
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u8 rsvd0[6];
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struct hinic_vport_stats stats;
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};
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int hinic_port_add_mac(struct hinic_dev *nic_dev, const u8 *addr,
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u16 vlan_id);
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int hinic_port_del_mac(struct hinic_dev *nic_dev, const u8 *addr,
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u16 vlan_id);
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int hinic_port_get_mac(struct hinic_dev *nic_dev, u8 *addr);
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int hinic_port_set_mtu(struct hinic_dev *nic_dev, int new_mtu);
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int hinic_port_add_vlan(struct hinic_dev *nic_dev, u16 vlan_id);
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int hinic_port_del_vlan(struct hinic_dev *nic_dev, u16 vlan_id);
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int hinic_port_set_rx_mode(struct hinic_dev *nic_dev, u32 rx_mode);
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int hinic_port_link_state(struct hinic_dev *nic_dev,
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enum hinic_port_link_state *link_state);
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int hinic_port_set_state(struct hinic_dev *nic_dev,
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enum hinic_port_state state);
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int hinic_port_set_func_state(struct hinic_dev *nic_dev,
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enum hinic_func_port_state state);
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int hinic_port_get_cap(struct hinic_dev *nic_dev,
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struct hinic_port_cap *port_cap);
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int hinic_set_max_qnum(struct hinic_dev *nic_dev, u8 num_rqs);
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int hinic_port_set_tso(struct hinic_dev *nic_dev, enum hinic_tso_state state);
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int hinic_set_rx_csum_offload(struct hinic_dev *nic_dev, u32 en);
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int hinic_set_rx_lro_state(struct hinic_dev *nic_dev, u8 lro_en,
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u32 lro_timer, u32 wqe_num);
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int hinic_set_rss_type(struct hinic_dev *nic_dev, u32 tmpl_idx,
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struct hinic_rss_type rss_type);
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int hinic_rss_set_indir_tbl(struct hinic_dev *nic_dev, u32 tmpl_idx,
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const u32 *indir_table);
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int hinic_rss_set_template_tbl(struct hinic_dev *nic_dev, u32 template_id,
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const u8 *temp);
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int hinic_rss_set_hash_engine(struct hinic_dev *nic_dev, u8 template_id,
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u8 type);
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int hinic_rss_cfg(struct hinic_dev *nic_dev, u8 rss_en, u8 template_id);
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int hinic_rss_template_alloc(struct hinic_dev *nic_dev, u8 *tmpl_idx);
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int hinic_rss_template_free(struct hinic_dev *nic_dev, u8 tmpl_idx);
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void hinic_set_ethtool_ops(struct net_device *netdev);
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int hinic_get_rss_type(struct hinic_dev *nic_dev, u32 tmpl_idx,
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struct hinic_rss_type *rss_type);
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int hinic_rss_get_indir_tbl(struct hinic_dev *nic_dev, u32 tmpl_idx,
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u32 *indir_table);
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int hinic_rss_get_template_tbl(struct hinic_dev *nic_dev, u32 tmpl_idx,
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u8 *temp);
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int hinic_rss_get_hash_engine(struct hinic_dev *nic_dev, u8 tmpl_idx,
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u8 *type);
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int hinic_get_phy_port_stats(struct hinic_dev *nic_dev,
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struct hinic_phy_port_stats *stats);
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int hinic_get_vport_stats(struct hinic_dev *nic_dev,
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struct hinic_vport_stats *stats);
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int hinic_set_rx_vlan_offload(struct hinic_dev *nic_dev, u8 en);
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int hinic_get_mgmt_version(struct hinic_dev *nic_dev, u8 *mgmt_ver);
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#endif
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