462 lines
12 KiB
C
462 lines
12 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* linux/arch/ia64/kernel/time.c
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*
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* Copyright (C) 1998-2003 Hewlett-Packard Co
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* Stephane Eranian <eranian@hpl.hp.com>
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* David Mosberger <davidm@hpl.hp.com>
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* Copyright (C) 1999 Don Dugger <don.dugger@intel.com>
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* Copyright (C) 1999-2000 VA Linux Systems
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* Copyright (C) 1999-2000 Walt Drummond <drummond@valinux.com>
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*/
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#include <linux/cpu.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/profile.h>
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#include <linux/sched.h>
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#include <linux/time.h>
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#include <linux/nmi.h>
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#include <linux/interrupt.h>
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#include <linux/efi.h>
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#include <linux/timex.h>
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#include <linux/timekeeper_internal.h>
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#include <linux/platform_device.h>
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#include <linux/sched/cputime.h>
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#include <asm/delay.h>
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#include <asm/hw_irq.h>
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#include <asm/ptrace.h>
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#include <asm/sal.h>
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#include <asm/sections.h>
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#include "fsyscall_gtod_data.h"
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static u64 itc_get_cycles(struct clocksource *cs);
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struct fsyscall_gtod_data_t fsyscall_gtod_data;
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struct itc_jitter_data_t itc_jitter_data;
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volatile int time_keeper_id = 0; /* smp_processor_id() of time-keeper */
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#ifdef CONFIG_IA64_DEBUG_IRQ
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unsigned long last_cli_ip;
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EXPORT_SYMBOL(last_cli_ip);
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#endif
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static struct clocksource clocksource_itc = {
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.name = "itc",
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.rating = 350,
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.read = itc_get_cycles,
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.mask = CLOCKSOURCE_MASK(64),
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.flags = CLOCK_SOURCE_IS_CONTINUOUS,
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};
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static struct clocksource *itc_clocksource;
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#ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
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#include <linux/kernel_stat.h>
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extern u64 cycle_to_nsec(u64 cyc);
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void vtime_flush(struct task_struct *tsk)
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{
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struct thread_info *ti = task_thread_info(tsk);
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u64 delta;
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if (ti->utime)
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account_user_time(tsk, cycle_to_nsec(ti->utime));
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if (ti->gtime)
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account_guest_time(tsk, cycle_to_nsec(ti->gtime));
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if (ti->idle_time)
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account_idle_time(cycle_to_nsec(ti->idle_time));
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if (ti->stime) {
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delta = cycle_to_nsec(ti->stime);
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account_system_index_time(tsk, delta, CPUTIME_SYSTEM);
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}
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if (ti->hardirq_time) {
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delta = cycle_to_nsec(ti->hardirq_time);
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account_system_index_time(tsk, delta, CPUTIME_IRQ);
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}
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if (ti->softirq_time) {
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delta = cycle_to_nsec(ti->softirq_time);
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account_system_index_time(tsk, delta, CPUTIME_SOFTIRQ);
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}
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ti->utime = 0;
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ti->gtime = 0;
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ti->idle_time = 0;
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ti->stime = 0;
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ti->hardirq_time = 0;
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ti->softirq_time = 0;
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}
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/*
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* Called from the context switch with interrupts disabled, to charge all
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* accumulated times to the current process, and to prepare accounting on
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* the next process.
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*/
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void arch_vtime_task_switch(struct task_struct *prev)
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{
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struct thread_info *pi = task_thread_info(prev);
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struct thread_info *ni = task_thread_info(current);
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ni->ac_stamp = pi->ac_stamp;
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ni->ac_stime = ni->ac_utime = 0;
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}
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/*
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* Account time for a transition between system, hard irq or soft irq state.
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* Note that this function is called with interrupts enabled.
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*/
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static __u64 vtime_delta(struct task_struct *tsk)
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{
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struct thread_info *ti = task_thread_info(tsk);
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__u64 now, delta_stime;
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WARN_ON_ONCE(!irqs_disabled());
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now = ia64_get_itc();
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delta_stime = now - ti->ac_stamp;
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ti->ac_stamp = now;
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return delta_stime;
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}
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void vtime_account_system(struct task_struct *tsk)
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{
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struct thread_info *ti = task_thread_info(tsk);
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__u64 stime = vtime_delta(tsk);
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if ((tsk->flags & PF_VCPU) && !irq_count())
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ti->gtime += stime;
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else if (hardirq_count())
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ti->hardirq_time += stime;
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else if (in_serving_softirq())
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ti->softirq_time += stime;
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else
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ti->stime += stime;
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}
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EXPORT_SYMBOL_GPL(vtime_account_system);
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void vtime_account_idle(struct task_struct *tsk)
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{
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struct thread_info *ti = task_thread_info(tsk);
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ti->idle_time += vtime_delta(tsk);
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}
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#endif /* CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */
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static irqreturn_t
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timer_interrupt (int irq, void *dev_id)
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{
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unsigned long new_itm;
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if (cpu_is_offline(smp_processor_id())) {
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return IRQ_HANDLED;
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}
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new_itm = local_cpu_data->itm_next;
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if (!time_after(ia64_get_itc(), new_itm))
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printk(KERN_ERR "Oops: timer tick before it's due (itc=%lx,itm=%lx)\n",
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ia64_get_itc(), new_itm);
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profile_tick(CPU_PROFILING);
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while (1) {
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update_process_times(user_mode(get_irq_regs()));
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new_itm += local_cpu_data->itm_delta;
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if (smp_processor_id() == time_keeper_id)
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xtime_update(1);
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local_cpu_data->itm_next = new_itm;
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if (time_after(new_itm, ia64_get_itc()))
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break;
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/*
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* Allow IPIs to interrupt the timer loop.
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*/
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local_irq_enable();
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local_irq_disable();
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}
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do {
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/*
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* If we're too close to the next clock tick for
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* comfort, we increase the safety margin by
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* intentionally dropping the next tick(s). We do NOT
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* update itm.next because that would force us to call
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* xtime_update() which in turn would let our clock run
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* too fast (with the potentially devastating effect
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* of losing monotony of time).
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*/
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while (!time_after(new_itm, ia64_get_itc() + local_cpu_data->itm_delta/2))
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new_itm += local_cpu_data->itm_delta;
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ia64_set_itm(new_itm);
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/* double check, in case we got hit by a (slow) PMI: */
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} while (time_after_eq(ia64_get_itc(), new_itm));
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return IRQ_HANDLED;
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}
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/*
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* Encapsulate access to the itm structure for SMP.
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*/
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void
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ia64_cpu_local_tick (void)
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{
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int cpu = smp_processor_id();
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unsigned long shift = 0, delta;
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/* arrange for the cycle counter to generate a timer interrupt: */
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ia64_set_itv(IA64_TIMER_VECTOR);
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delta = local_cpu_data->itm_delta;
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/*
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* Stagger the timer tick for each CPU so they don't occur all at (almost) the
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* same time:
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*/
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if (cpu) {
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unsigned long hi = 1UL << ia64_fls(cpu);
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shift = (2*(cpu - hi) + 1) * delta/hi/2;
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}
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local_cpu_data->itm_next = ia64_get_itc() + delta + shift;
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ia64_set_itm(local_cpu_data->itm_next);
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}
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static int nojitter;
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static int __init nojitter_setup(char *str)
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{
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nojitter = 1;
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printk("Jitter checking for ITC timers disabled\n");
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return 1;
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}
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__setup("nojitter", nojitter_setup);
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void ia64_init_itm(void)
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{
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unsigned long platform_base_freq, itc_freq;
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struct pal_freq_ratio itc_ratio, proc_ratio;
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long status, platform_base_drift, itc_drift;
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/*
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* According to SAL v2.6, we need to use a SAL call to determine the platform base
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* frequency and then a PAL call to determine the frequency ratio between the ITC
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* and the base frequency.
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*/
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status = ia64_sal_freq_base(SAL_FREQ_BASE_PLATFORM,
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&platform_base_freq, &platform_base_drift);
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if (status != 0) {
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printk(KERN_ERR "SAL_FREQ_BASE_PLATFORM failed: %s\n", ia64_sal_strerror(status));
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} else {
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status = ia64_pal_freq_ratios(&proc_ratio, NULL, &itc_ratio);
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if (status != 0)
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printk(KERN_ERR "PAL_FREQ_RATIOS failed with status=%ld\n", status);
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}
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if (status != 0) {
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/* invent "random" values */
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printk(KERN_ERR
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"SAL/PAL failed to obtain frequency info---inventing reasonable values\n");
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platform_base_freq = 100000000;
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platform_base_drift = -1; /* no drift info */
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itc_ratio.num = 3;
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itc_ratio.den = 1;
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}
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if (platform_base_freq < 40000000) {
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printk(KERN_ERR "Platform base frequency %lu bogus---resetting to 75MHz!\n",
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platform_base_freq);
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platform_base_freq = 75000000;
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platform_base_drift = -1;
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}
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if (!proc_ratio.den)
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proc_ratio.den = 1; /* avoid division by zero */
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if (!itc_ratio.den)
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itc_ratio.den = 1; /* avoid division by zero */
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itc_freq = (platform_base_freq*itc_ratio.num)/itc_ratio.den;
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local_cpu_data->itm_delta = (itc_freq + HZ/2) / HZ;
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printk(KERN_DEBUG "CPU %d: base freq=%lu.%03luMHz, ITC ratio=%u/%u, "
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"ITC freq=%lu.%03luMHz", smp_processor_id(),
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platform_base_freq / 1000000, (platform_base_freq / 1000) % 1000,
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itc_ratio.num, itc_ratio.den, itc_freq / 1000000, (itc_freq / 1000) % 1000);
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if (platform_base_drift != -1) {
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itc_drift = platform_base_drift*itc_ratio.num/itc_ratio.den;
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printk("+/-%ldppm\n", itc_drift);
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} else {
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itc_drift = -1;
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printk("\n");
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}
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local_cpu_data->proc_freq = (platform_base_freq*proc_ratio.num)/proc_ratio.den;
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local_cpu_data->itc_freq = itc_freq;
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local_cpu_data->cyc_per_usec = (itc_freq + USEC_PER_SEC/2) / USEC_PER_SEC;
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local_cpu_data->nsec_per_cyc = ((NSEC_PER_SEC<<IA64_NSEC_PER_CYC_SHIFT)
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+ itc_freq/2)/itc_freq;
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if (!(sal_platform_features & IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT)) {
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#ifdef CONFIG_SMP
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/* On IA64 in an SMP configuration ITCs are never accurately synchronized.
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* Jitter compensation requires a cmpxchg which may limit
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* the scalability of the syscalls for retrieving time.
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* The ITC synchronization is usually successful to within a few
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* ITC ticks but this is not a sure thing. If you need to improve
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* timer performance in SMP situations then boot the kernel with the
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* "nojitter" option. However, doing so may result in time fluctuating (maybe
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* even going backward) if the ITC offsets between the individual CPUs
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* are too large.
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*/
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if (!nojitter)
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itc_jitter_data.itc_jitter = 1;
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#endif
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} else
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/*
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* ITC is drifty and we have not synchronized the ITCs in smpboot.c.
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* ITC values may fluctuate significantly between processors.
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* Clock should not be used for hrtimers. Mark itc as only
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* useful for boot and testing.
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*
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* Note that jitter compensation is off! There is no point of
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* synchronizing ITCs since they may be large differentials
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* that change over time.
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*
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* The only way to fix this would be to repeatedly sync the
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* ITCs. Until that time we have to avoid ITC.
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*/
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clocksource_itc.rating = 50;
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/* avoid softlock up message when cpu is unplug and plugged again. */
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touch_softlockup_watchdog();
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/* Setup the CPU local timer tick */
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ia64_cpu_local_tick();
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if (!itc_clocksource) {
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clocksource_register_hz(&clocksource_itc,
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local_cpu_data->itc_freq);
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itc_clocksource = &clocksource_itc;
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}
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}
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static u64 itc_get_cycles(struct clocksource *cs)
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{
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unsigned long lcycle, now, ret;
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if (!itc_jitter_data.itc_jitter)
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return get_cycles();
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lcycle = itc_jitter_data.itc_lastcycle;
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now = get_cycles();
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if (lcycle && time_after(lcycle, now))
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return lcycle;
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/*
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* Keep track of the last timer value returned.
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* In an SMP environment, you could lose out in contention of
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* cmpxchg. If so, your cmpxchg returns new value which the
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* winner of contention updated to. Use the new value instead.
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*/
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ret = cmpxchg(&itc_jitter_data.itc_lastcycle, lcycle, now);
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if (unlikely(ret != lcycle))
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return ret;
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return now;
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}
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static struct irqaction timer_irqaction = {
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.handler = timer_interrupt,
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.flags = IRQF_IRQPOLL,
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.name = "timer"
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};
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void read_persistent_clock64(struct timespec64 *ts)
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{
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efi_gettimeofday(ts);
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}
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void __init
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time_init (void)
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{
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register_percpu_irq(IA64_TIMER_VECTOR, &timer_irqaction);
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ia64_init_itm();
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}
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/*
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* Generic udelay assumes that if preemption is allowed and the thread
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* migrates to another CPU, that the ITC values are synchronized across
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* all CPUs.
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*/
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static void
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ia64_itc_udelay (unsigned long usecs)
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{
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unsigned long start = ia64_get_itc();
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unsigned long end = start + usecs*local_cpu_data->cyc_per_usec;
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while (time_before(ia64_get_itc(), end))
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cpu_relax();
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}
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void (*ia64_udelay)(unsigned long usecs) = &ia64_itc_udelay;
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void
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udelay (unsigned long usecs)
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{
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(*ia64_udelay)(usecs);
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}
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EXPORT_SYMBOL(udelay);
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/* IA64 doesn't cache the timezone */
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void update_vsyscall_tz(void)
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{
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}
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void update_vsyscall(struct timekeeper *tk)
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{
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write_seqcount_begin(&fsyscall_gtod_data.seq);
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/* copy vsyscall data */
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fsyscall_gtod_data.clk_mask = tk->tkr_mono.mask;
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fsyscall_gtod_data.clk_mult = tk->tkr_mono.mult;
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fsyscall_gtod_data.clk_shift = tk->tkr_mono.shift;
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fsyscall_gtod_data.clk_fsys_mmio = tk->tkr_mono.clock->archdata.fsys_mmio;
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fsyscall_gtod_data.clk_cycle_last = tk->tkr_mono.cycle_last;
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fsyscall_gtod_data.wall_time.sec = tk->xtime_sec;
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fsyscall_gtod_data.wall_time.snsec = tk->tkr_mono.xtime_nsec;
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fsyscall_gtod_data.monotonic_time.sec = tk->xtime_sec
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+ tk->wall_to_monotonic.tv_sec;
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fsyscall_gtod_data.monotonic_time.snsec = tk->tkr_mono.xtime_nsec
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+ ((u64)tk->wall_to_monotonic.tv_nsec
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<< tk->tkr_mono.shift);
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/* normalize */
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while (fsyscall_gtod_data.monotonic_time.snsec >=
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(((u64)NSEC_PER_SEC) << tk->tkr_mono.shift)) {
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fsyscall_gtod_data.monotonic_time.snsec -=
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((u64)NSEC_PER_SEC) << tk->tkr_mono.shift;
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fsyscall_gtod_data.monotonic_time.sec++;
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}
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write_seqcount_end(&fsyscall_gtod_data.seq);
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}
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