226 lines
9.1 KiB
Plaintext
226 lines
9.1 KiB
Plaintext
Asynchronous Transfers/Transforms API
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1 INTRODUCTION
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2 GENEALOGY
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3 USAGE
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3.1 General format of the API
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3.2 Supported operations
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3.3 Descriptor management
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3.4 When does the operation execute?
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3.5 When does the operation complete?
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3.6 Constraints
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3.7 Example
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4 DMAENGINE DRIVER DEVELOPER NOTES
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4.1 Conformance points
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4.2 "My application needs exclusive control of hardware channels"
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5 SOURCE
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---
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1 INTRODUCTION
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The async_tx API provides methods for describing a chain of asynchronous
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bulk memory transfers/transforms with support for inter-transactional
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dependencies. It is implemented as a dmaengine client that smooths over
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the details of different hardware offload engine implementations. Code
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that is written to the API can optimize for asynchronous operation and
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the API will fit the chain of operations to the available offload
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resources.
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2 GENEALOGY
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The API was initially designed to offload the memory copy and
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xor-parity-calculations of the md-raid5 driver using the offload engines
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present in the Intel(R) Xscale series of I/O processors. It also built
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on the 'dmaengine' layer developed for offloading memory copies in the
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network stack using Intel(R) I/OAT engines. The following design
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features surfaced as a result:
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1/ implicit synchronous path: users of the API do not need to know if
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the platform they are running on has offload capabilities. The
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operation will be offloaded when an engine is available and carried out
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in software otherwise.
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2/ cross channel dependency chains: the API allows a chain of dependent
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operations to be submitted, like xor->copy->xor in the raid5 case. The
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API automatically handles cases where the transition from one operation
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to another implies a hardware channel switch.
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3/ dmaengine extensions to support multiple clients and operation types
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beyond 'memcpy'
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3 USAGE
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3.1 General format of the API:
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struct dma_async_tx_descriptor *
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async_<operation>(<op specific parameters>, struct async_submit ctl *submit)
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3.2 Supported operations:
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memcpy - memory copy between a source and a destination buffer
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memset - fill a destination buffer with a byte value
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xor - xor a series of source buffers and write the result to a
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destination buffer
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xor_val - xor a series of source buffers and set a flag if the
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result is zero. The implementation attempts to prevent
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writes to memory
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pq - generate the p+q (raid6 syndrome) from a series of source buffers
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pq_val - validate that a p and or q buffer are in sync with a given series of
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sources
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datap - (raid6_datap_recov) recover a raid6 data block and the p block
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from the given sources
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2data - (raid6_2data_recov) recover 2 raid6 data blocks from the given
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sources
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3.3 Descriptor management:
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The return value is non-NULL and points to a 'descriptor' when the operation
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has been queued to execute asynchronously. Descriptors are recycled
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resources, under control of the offload engine driver, to be reused as
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operations complete. When an application needs to submit a chain of
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operations it must guarantee that the descriptor is not automatically recycled
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before the dependency is submitted. This requires that all descriptors be
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acknowledged by the application before the offload engine driver is allowed to
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recycle (or free) the descriptor. A descriptor can be acked by one of the
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following methods:
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1/ setting the ASYNC_TX_ACK flag if no child operations are to be submitted
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2/ submitting an unacknowledged descriptor as a dependency to another
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async_tx call will implicitly set the acknowledged state.
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3/ calling async_tx_ack() on the descriptor.
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3.4 When does the operation execute?
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Operations do not immediately issue after return from the
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async_<operation> call. Offload engine drivers batch operations to
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improve performance by reducing the number of mmio cycles needed to
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manage the channel. Once a driver-specific threshold is met the driver
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automatically issues pending operations. An application can force this
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event by calling async_tx_issue_pending_all(). This operates on all
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channels since the application has no knowledge of channel to operation
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mapping.
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3.5 When does the operation complete?
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There are two methods for an application to learn about the completion
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of an operation.
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1/ Call dma_wait_for_async_tx(). This call causes the CPU to spin while
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it polls for the completion of the operation. It handles dependency
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chains and issuing pending operations.
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2/ Specify a completion callback. The callback routine runs in tasklet
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context if the offload engine driver supports interrupts, or it is
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called in application context if the operation is carried out
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synchronously in software. The callback can be set in the call to
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async_<operation>, or when the application needs to submit a chain of
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unknown length it can use the async_trigger_callback() routine to set a
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completion interrupt/callback at the end of the chain.
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3.6 Constraints:
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1/ Calls to async_<operation> are not permitted in IRQ context. Other
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contexts are permitted provided constraint #2 is not violated.
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2/ Completion callback routines cannot submit new operations. This
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results in recursion in the synchronous case and spin_locks being
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acquired twice in the asynchronous case.
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3.7 Example:
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Perform a xor->copy->xor operation where each operation depends on the
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result from the previous operation:
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void callback(void *param)
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{
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struct completion *cmp = param;
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complete(cmp);
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}
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void run_xor_copy_xor(struct page **xor_srcs,
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int xor_src_cnt,
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struct page *xor_dest,
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size_t xor_len,
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struct page *copy_src,
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struct page *copy_dest,
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size_t copy_len)
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{
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struct dma_async_tx_descriptor *tx;
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addr_conv_t addr_conv[xor_src_cnt];
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struct async_submit_ctl submit;
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addr_conv_t addr_conv[NDISKS];
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struct completion cmp;
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init_async_submit(&submit, ASYNC_TX_XOR_DROP_DST, NULL, NULL, NULL,
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addr_conv);
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tx = async_xor(xor_dest, xor_srcs, 0, xor_src_cnt, xor_len, &submit)
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submit->depend_tx = tx;
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tx = async_memcpy(copy_dest, copy_src, 0, 0, copy_len, &submit);
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init_completion(&cmp);
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init_async_submit(&submit, ASYNC_TX_XOR_DROP_DST | ASYNC_TX_ACK, tx,
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callback, &cmp, addr_conv);
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tx = async_xor(xor_dest, xor_srcs, 0, xor_src_cnt, xor_len, &submit);
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async_tx_issue_pending_all();
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wait_for_completion(&cmp);
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}
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See include/linux/async_tx.h for more information on the flags. See the
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ops_run_* and ops_complete_* routines in drivers/md/raid5.c for more
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implementation examples.
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4 DRIVER DEVELOPMENT NOTES
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4.1 Conformance points:
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There are a few conformance points required in dmaengine drivers to
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accommodate assumptions made by applications using the async_tx API:
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1/ Completion callbacks are expected to happen in tasklet context
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2/ dma_async_tx_descriptor fields are never manipulated in IRQ context
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3/ Use async_tx_run_dependencies() in the descriptor clean up path to
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handle submission of dependent operations
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4.2 "My application needs exclusive control of hardware channels"
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Primarily this requirement arises from cases where a DMA engine driver
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is being used to support device-to-memory operations. A channel that is
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performing these operations cannot, for many platform specific reasons,
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be shared. For these cases the dma_request_channel() interface is
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provided.
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The interface is:
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struct dma_chan *dma_request_channel(dma_cap_mask_t mask,
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dma_filter_fn filter_fn,
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void *filter_param);
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Where dma_filter_fn is defined as:
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typedef bool (*dma_filter_fn)(struct dma_chan *chan, void *filter_param);
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When the optional 'filter_fn' parameter is set to NULL
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dma_request_channel simply returns the first channel that satisfies the
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capability mask. Otherwise, when the mask parameter is insufficient for
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specifying the necessary channel, the filter_fn routine can be used to
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disposition the available channels in the system. The filter_fn routine
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is called once for each free channel in the system. Upon seeing a
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suitable channel filter_fn returns DMA_ACK which flags that channel to
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be the return value from dma_request_channel. A channel allocated via
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this interface is exclusive to the caller, until dma_release_channel()
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is called.
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The DMA_PRIVATE capability flag is used to tag dma devices that should
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not be used by the general-purpose allocator. It can be set at
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initialization time if it is known that a channel will always be
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private. Alternatively, it is set when dma_request_channel() finds an
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unused "public" channel.
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A couple caveats to note when implementing a driver and consumer:
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1/ Once a channel has been privately allocated it will no longer be
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considered by the general-purpose allocator even after a call to
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dma_release_channel().
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2/ Since capabilities are specified at the device level a dma_device
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with multiple channels will either have all channels public, or all
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channels private.
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5 SOURCE
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include/linux/dmaengine.h: core header file for DMA drivers and api users
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drivers/dma/dmaengine.c: offload engine channel management routines
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drivers/dma/: location for offload engine drivers
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include/linux/async_tx.h: core header file for the async_tx api
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crypto/async_tx/async_tx.c: async_tx interface to dmaengine and common code
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crypto/async_tx/async_memcpy.c: copy offload
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crypto/async_tx/async_xor.c: xor and xor zero sum offload
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