593 lines
14 KiB
C
593 lines
14 KiB
C
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* fsgsbase.c, an fsgsbase test
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* Copyright (c) 2014-2016 Andy Lutomirski
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*/
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#define _GNU_SOURCE
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#include <stdio.h>
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#include <stdlib.h>
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#include <stdbool.h>
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#include <string.h>
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#include <sys/syscall.h>
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#include <unistd.h>
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#include <err.h>
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#include <sys/user.h>
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#include <asm/prctl.h>
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#include <sys/prctl.h>
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#include <signal.h>
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#include <limits.h>
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#include <sys/ucontext.h>
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#include <sched.h>
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#include <linux/futex.h>
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#include <pthread.h>
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#include <asm/ldt.h>
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#include <sys/mman.h>
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#include <stddef.h>
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#include <sys/ptrace.h>
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#include <sys/wait.h>
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#include <setjmp.h>
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#ifndef __x86_64__
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# error This test is 64-bit only
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#endif
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static volatile sig_atomic_t want_segv;
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static volatile unsigned long segv_addr;
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static unsigned short *shared_scratch;
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static int nerrs;
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static void sethandler(int sig, void (*handler)(int, siginfo_t *, void *),
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int flags)
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{
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struct sigaction sa;
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memset(&sa, 0, sizeof(sa));
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sa.sa_sigaction = handler;
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sa.sa_flags = SA_SIGINFO | flags;
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sigemptyset(&sa.sa_mask);
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if (sigaction(sig, &sa, 0))
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err(1, "sigaction");
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}
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static void clearhandler(int sig)
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{
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struct sigaction sa;
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memset(&sa, 0, sizeof(sa));
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sa.sa_handler = SIG_DFL;
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sigemptyset(&sa.sa_mask);
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if (sigaction(sig, &sa, 0))
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err(1, "sigaction");
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}
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static void sigsegv(int sig, siginfo_t *si, void *ctx_void)
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{
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ucontext_t *ctx = (ucontext_t*)ctx_void;
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if (!want_segv) {
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clearhandler(SIGSEGV);
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return; /* Crash cleanly. */
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}
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want_segv = false;
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segv_addr = (unsigned long)si->si_addr;
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ctx->uc_mcontext.gregs[REG_RIP] += 4; /* Skip the faulting mov */
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}
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static jmp_buf jmpbuf;
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static void sigill(int sig, siginfo_t *si, void *ctx_void)
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{
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siglongjmp(jmpbuf, 1);
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}
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static bool have_fsgsbase;
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static inline unsigned long rdgsbase(void)
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{
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unsigned long gsbase;
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asm volatile("rdgsbase %0" : "=r" (gsbase) :: "memory");
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return gsbase;
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}
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static inline unsigned long rdfsbase(void)
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{
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unsigned long fsbase;
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asm volatile("rdfsbase %0" : "=r" (fsbase) :: "memory");
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return fsbase;
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}
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static inline void wrgsbase(unsigned long gsbase)
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{
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asm volatile("wrgsbase %0" :: "r" (gsbase) : "memory");
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}
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static inline void wrfsbase(unsigned long fsbase)
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{
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asm volatile("wrfsbase %0" :: "r" (fsbase) : "memory");
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}
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enum which_base { FS, GS };
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static unsigned long read_base(enum which_base which)
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{
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unsigned long offset;
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/*
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* Unless we have FSGSBASE, there's no direct way to do this from
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* user mode. We can get at it indirectly using signals, though.
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*/
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want_segv = true;
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offset = 0;
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if (which == FS) {
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/* Use a constant-length instruction here. */
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asm volatile ("mov %%fs:(%%rcx), %%rax" : : "c" (offset) : "rax");
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} else {
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asm volatile ("mov %%gs:(%%rcx), %%rax" : : "c" (offset) : "rax");
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}
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if (!want_segv)
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return segv_addr + offset;
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/*
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* If that didn't segfault, try the other end of the address space.
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* Unless we get really unlucky and run into the vsyscall page, this
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* is guaranteed to segfault.
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*/
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offset = (ULONG_MAX >> 1) + 1;
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if (which == FS) {
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asm volatile ("mov %%fs:(%%rcx), %%rax"
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: : "c" (offset) : "rax");
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} else {
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asm volatile ("mov %%gs:(%%rcx), %%rax"
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: : "c" (offset) : "rax");
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}
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if (!want_segv)
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return segv_addr + offset;
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abort();
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}
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static void check_gs_value(unsigned long value)
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{
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unsigned long base;
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unsigned short sel;
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printf("[RUN]\tARCH_SET_GS to 0x%lx\n", value);
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if (syscall(SYS_arch_prctl, ARCH_SET_GS, value) != 0)
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err(1, "ARCH_SET_GS");
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asm volatile ("mov %%gs, %0" : "=rm" (sel));
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base = read_base(GS);
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if (base == value) {
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printf("[OK]\tGSBASE was set as expected (selector 0x%hx)\n",
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sel);
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} else {
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nerrs++;
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printf("[FAIL]\tGSBASE was not as expected: got 0x%lx (selector 0x%hx)\n",
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base, sel);
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}
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if (syscall(SYS_arch_prctl, ARCH_GET_GS, &base) != 0)
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err(1, "ARCH_GET_GS");
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if (base == value) {
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printf("[OK]\tARCH_GET_GS worked as expected (selector 0x%hx)\n",
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sel);
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} else {
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nerrs++;
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printf("[FAIL]\tARCH_GET_GS was not as expected: got 0x%lx (selector 0x%hx)\n",
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base, sel);
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}
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}
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static void mov_0_gs(unsigned long initial_base, bool schedule)
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{
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unsigned long base, arch_base;
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printf("[RUN]\tARCH_SET_GS to 0x%lx then mov 0 to %%gs%s\n", initial_base, schedule ? " and schedule " : "");
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if (syscall(SYS_arch_prctl, ARCH_SET_GS, initial_base) != 0)
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err(1, "ARCH_SET_GS");
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if (schedule)
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usleep(10);
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asm volatile ("mov %0, %%gs" : : "rm" (0));
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base = read_base(GS);
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if (syscall(SYS_arch_prctl, ARCH_GET_GS, &arch_base) != 0)
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err(1, "ARCH_GET_GS");
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if (base == arch_base) {
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printf("[OK]\tGSBASE is 0x%lx\n", base);
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} else {
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nerrs++;
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printf("[FAIL]\tGSBASE changed to 0x%lx but kernel reports 0x%lx\n", base, arch_base);
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}
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}
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static volatile unsigned long remote_base;
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static volatile bool remote_hard_zero;
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static volatile unsigned int ftx;
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/*
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* ARCH_SET_FS/GS(0) may or may not program a selector of zero. HARD_ZERO
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* means to force the selector to zero to improve test coverage.
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*/
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#define HARD_ZERO 0xa1fa5f343cb85fa4
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static void do_remote_base()
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{
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unsigned long to_set = remote_base;
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bool hard_zero = false;
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if (to_set == HARD_ZERO) {
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to_set = 0;
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hard_zero = true;
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}
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if (syscall(SYS_arch_prctl, ARCH_SET_GS, to_set) != 0)
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err(1, "ARCH_SET_GS");
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if (hard_zero)
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asm volatile ("mov %0, %%gs" : : "rm" ((unsigned short)0));
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unsigned short sel;
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asm volatile ("mov %%gs, %0" : "=rm" (sel));
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printf("\tother thread: ARCH_SET_GS(0x%lx)%s -- sel is 0x%hx\n",
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to_set, hard_zero ? " and clear gs" : "", sel);
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}
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static __thread int set_thread_area_entry_number = -1;
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static unsigned short load_gs(void)
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{
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/*
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* Sets GS != 0 and GSBASE != 0 but arranges for the kernel to think
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* that GSBASE == 0 (i.e. thread.gsbase == 0).
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*/
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/* Step 1: tell the kernel that we have GSBASE == 0. */
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if (syscall(SYS_arch_prctl, ARCH_SET_GS, 0) != 0)
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err(1, "ARCH_SET_GS");
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/* Step 2: change GSBASE without telling the kernel. */
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struct user_desc desc = {
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.entry_number = 0,
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.base_addr = 0xBAADF00D,
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.limit = 0xfffff,
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.seg_32bit = 1,
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.contents = 0, /* Data, grow-up */
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.read_exec_only = 0,
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.limit_in_pages = 1,
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.seg_not_present = 0,
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.useable = 0
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};
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if (syscall(SYS_modify_ldt, 1, &desc, sizeof(desc)) == 0) {
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printf("\tusing LDT slot 0\n");
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asm volatile ("mov %0, %%gs" : : "rm" ((unsigned short)0x7));
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return 0x7;
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} else {
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/* No modify_ldt for us (configured out, perhaps) */
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struct user_desc *low_desc = mmap(
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NULL, sizeof(desc),
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PROT_READ | PROT_WRITE,
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MAP_PRIVATE | MAP_ANONYMOUS | MAP_32BIT, -1, 0);
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memcpy(low_desc, &desc, sizeof(desc));
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low_desc->entry_number = set_thread_area_entry_number;
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/* 32-bit set_thread_area */
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long ret;
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asm volatile ("int $0x80"
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: "=a" (ret) : "a" (243), "b" (low_desc)
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: "r8", "r9", "r10", "r11");
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memcpy(&desc, low_desc, sizeof(desc));
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munmap(low_desc, sizeof(desc));
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if (ret != 0) {
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printf("[NOTE]\tcould not create a segment -- test won't do anything\n");
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return 0;
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}
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printf("\tusing GDT slot %d\n", desc.entry_number);
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set_thread_area_entry_number = desc.entry_number;
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unsigned short gs = (unsigned short)((desc.entry_number << 3) | 0x3);
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asm volatile ("mov %0, %%gs" : : "rm" (gs));
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return gs;
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}
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}
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void test_wrbase(unsigned short index, unsigned long base)
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{
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unsigned short newindex;
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unsigned long newbase;
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printf("[RUN]\tGS = 0x%hx, GSBASE = 0x%lx\n", index, base);
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asm volatile ("mov %0, %%gs" : : "rm" (index));
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wrgsbase(base);
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remote_base = 0;
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ftx = 1;
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syscall(SYS_futex, &ftx, FUTEX_WAKE, 0, NULL, NULL, 0);
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while (ftx != 0)
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syscall(SYS_futex, &ftx, FUTEX_WAIT, 1, NULL, NULL, 0);
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asm volatile ("mov %%gs, %0" : "=rm" (newindex));
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newbase = rdgsbase();
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if (newindex == index && newbase == base) {
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printf("[OK]\tIndex and base were preserved\n");
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} else {
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printf("[FAIL]\tAfter switch, GS = 0x%hx and GSBASE = 0x%lx\n",
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newindex, newbase);
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nerrs++;
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}
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}
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static void *threadproc(void *ctx)
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{
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while (1) {
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while (ftx == 0)
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syscall(SYS_futex, &ftx, FUTEX_WAIT, 0, NULL, NULL, 0);
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if (ftx == 3)
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return NULL;
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if (ftx == 1) {
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do_remote_base();
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} else if (ftx == 2) {
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/*
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* On AMD chips, this causes GSBASE != 0, GS == 0, and
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* thread.gsbase == 0.
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*/
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load_gs();
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asm volatile ("mov %0, %%gs" : : "rm" ((unsigned short)0));
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} else {
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errx(1, "helper thread got bad command");
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}
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ftx = 0;
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syscall(SYS_futex, &ftx, FUTEX_WAKE, 0, NULL, NULL, 0);
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}
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}
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static void set_gs_and_switch_to(unsigned long local,
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unsigned short force_sel,
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unsigned long remote)
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{
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unsigned long base;
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unsigned short sel_pre_sched, sel_post_sched;
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bool hard_zero = false;
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if (local == HARD_ZERO) {
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hard_zero = true;
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local = 0;
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}
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printf("[RUN]\tARCH_SET_GS(0x%lx)%s, then schedule to 0x%lx\n",
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local, hard_zero ? " and clear gs" : "", remote);
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if (force_sel)
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printf("\tBefore schedule, set selector to 0x%hx\n", force_sel);
|
||
|
|
if (syscall(SYS_arch_prctl, ARCH_SET_GS, local) != 0)
|
||
|
|
err(1, "ARCH_SET_GS");
|
||
|
|
if (hard_zero)
|
||
|
|
asm volatile ("mov %0, %%gs" : : "rm" ((unsigned short)0));
|
||
|
|
|
||
|
|
if (read_base(GS) != local) {
|
||
|
|
nerrs++;
|
||
|
|
printf("[FAIL]\tGSBASE wasn't set as expected\n");
|
||
|
|
}
|
||
|
|
|
||
|
|
if (force_sel) {
|
||
|
|
asm volatile ("mov %0, %%gs" : : "rm" (force_sel));
|
||
|
|
sel_pre_sched = force_sel;
|
||
|
|
local = read_base(GS);
|
||
|
|
|
||
|
|
/*
|
||
|
|
* Signal delivery seems to mess up weird selectors. Put it
|
||
|
|
* back.
|
||
|
|
*/
|
||
|
|
asm volatile ("mov %0, %%gs" : : "rm" (force_sel));
|
||
|
|
} else {
|
||
|
|
asm volatile ("mov %%gs, %0" : "=rm" (sel_pre_sched));
|
||
|
|
}
|
||
|
|
|
||
|
|
remote_base = remote;
|
||
|
|
ftx = 1;
|
||
|
|
syscall(SYS_futex, &ftx, FUTEX_WAKE, 0, NULL, NULL, 0);
|
||
|
|
while (ftx != 0)
|
||
|
|
syscall(SYS_futex, &ftx, FUTEX_WAIT, 1, NULL, NULL, 0);
|
||
|
|
|
||
|
|
asm volatile ("mov %%gs, %0" : "=rm" (sel_post_sched));
|
||
|
|
base = read_base(GS);
|
||
|
|
if (base == local && sel_pre_sched == sel_post_sched) {
|
||
|
|
printf("[OK]\tGS/BASE remained 0x%hx/0x%lx\n",
|
||
|
|
sel_pre_sched, local);
|
||
|
|
} else {
|
||
|
|
nerrs++;
|
||
|
|
printf("[FAIL]\tGS/BASE changed from 0x%hx/0x%lx to 0x%hx/0x%lx\n",
|
||
|
|
sel_pre_sched, local, sel_post_sched, base);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
static void test_unexpected_base(void)
|
||
|
|
{
|
||
|
|
unsigned long base;
|
||
|
|
|
||
|
|
printf("[RUN]\tARCH_SET_GS(0), clear gs, then manipulate GSBASE in a different thread\n");
|
||
|
|
if (syscall(SYS_arch_prctl, ARCH_SET_GS, 0) != 0)
|
||
|
|
err(1, "ARCH_SET_GS");
|
||
|
|
asm volatile ("mov %0, %%gs" : : "rm" ((unsigned short)0));
|
||
|
|
|
||
|
|
ftx = 2;
|
||
|
|
syscall(SYS_futex, &ftx, FUTEX_WAKE, 0, NULL, NULL, 0);
|
||
|
|
while (ftx != 0)
|
||
|
|
syscall(SYS_futex, &ftx, FUTEX_WAIT, 1, NULL, NULL, 0);
|
||
|
|
|
||
|
|
base = read_base(GS);
|
||
|
|
if (base == 0) {
|
||
|
|
printf("[OK]\tGSBASE remained 0\n");
|
||
|
|
} else {
|
||
|
|
nerrs++;
|
||
|
|
printf("[FAIL]\tGSBASE changed to 0x%lx\n", base);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
#define USER_REGS_OFFSET(r) offsetof(struct user_regs_struct, r)
|
||
|
|
|
||
|
|
static void test_ptrace_write_gsbase(void)
|
||
|
|
{
|
||
|
|
int status;
|
||
|
|
pid_t child = fork();
|
||
|
|
|
||
|
|
if (child < 0)
|
||
|
|
err(1, "fork");
|
||
|
|
|
||
|
|
if (child == 0) {
|
||
|
|
printf("[RUN]\tPTRACE_POKE(), write GSBASE from ptracer\n");
|
||
|
|
|
||
|
|
*shared_scratch = load_gs();
|
||
|
|
|
||
|
|
if (ptrace(PTRACE_TRACEME, 0, NULL, NULL) != 0)
|
||
|
|
err(1, "PTRACE_TRACEME");
|
||
|
|
|
||
|
|
raise(SIGTRAP);
|
||
|
|
_exit(0);
|
||
|
|
}
|
||
|
|
|
||
|
|
wait(&status);
|
||
|
|
|
||
|
|
if (WSTOPSIG(status) == SIGTRAP) {
|
||
|
|
unsigned long gs, base;
|
||
|
|
unsigned long gs_offset = USER_REGS_OFFSET(gs);
|
||
|
|
unsigned long base_offset = USER_REGS_OFFSET(gs_base);
|
||
|
|
|
||
|
|
gs = ptrace(PTRACE_PEEKUSER, child, gs_offset, NULL);
|
||
|
|
|
||
|
|
if (gs != *shared_scratch) {
|
||
|
|
nerrs++;
|
||
|
|
printf("[FAIL]\tGS is not prepared with nonzero\n");
|
||
|
|
goto END;
|
||
|
|
}
|
||
|
|
|
||
|
|
if (ptrace(PTRACE_POKEUSER, child, base_offset, 0xFF) != 0)
|
||
|
|
err(1, "PTRACE_POKEUSER");
|
||
|
|
|
||
|
|
gs = ptrace(PTRACE_PEEKUSER, child, gs_offset, NULL);
|
||
|
|
base = ptrace(PTRACE_PEEKUSER, child, base_offset, NULL);
|
||
|
|
|
||
|
|
/*
|
||
|
|
* In a non-FSGSBASE system, the nonzero selector will load
|
||
|
|
* GSBASE (again). But what is tested here is whether the
|
||
|
|
* selector value is changed or not by the GSBASE write in
|
||
|
|
* a ptracer.
|
||
|
|
*/
|
||
|
|
if (gs == 0 && base == 0xFF) {
|
||
|
|
printf("[OK]\tGS was reset as expected\n");
|
||
|
|
} else {
|
||
|
|
nerrs++;
|
||
|
|
printf("[FAIL]\tGS=0x%lx, GSBASE=0x%lx (should be 0, 0xFF)\n", gs, base);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
END:
|
||
|
|
ptrace(PTRACE_CONT, child, NULL, NULL);
|
||
|
|
}
|
||
|
|
|
||
|
|
int main()
|
||
|
|
{
|
||
|
|
pthread_t thread;
|
||
|
|
|
||
|
|
shared_scratch = mmap(NULL, 4096, PROT_READ | PROT_WRITE,
|
||
|
|
MAP_ANONYMOUS | MAP_SHARED, -1, 0);
|
||
|
|
|
||
|
|
/* Probe FSGSBASE */
|
||
|
|
sethandler(SIGILL, sigill, 0);
|
||
|
|
if (sigsetjmp(jmpbuf, 1) == 0) {
|
||
|
|
rdfsbase();
|
||
|
|
have_fsgsbase = true;
|
||
|
|
printf("\tFSGSBASE instructions are enabled\n");
|
||
|
|
} else {
|
||
|
|
printf("\tFSGSBASE instructions are disabled\n");
|
||
|
|
}
|
||
|
|
clearhandler(SIGILL);
|
||
|
|
|
||
|
|
sethandler(SIGSEGV, sigsegv, 0);
|
||
|
|
|
||
|
|
check_gs_value(0);
|
||
|
|
check_gs_value(1);
|
||
|
|
check_gs_value(0x200000000);
|
||
|
|
check_gs_value(0);
|
||
|
|
check_gs_value(0x200000000);
|
||
|
|
check_gs_value(1);
|
||
|
|
|
||
|
|
for (int sched = 0; sched < 2; sched++) {
|
||
|
|
mov_0_gs(0, !!sched);
|
||
|
|
mov_0_gs(1, !!sched);
|
||
|
|
mov_0_gs(0x200000000, !!sched);
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Set up for multithreading. */
|
||
|
|
|
||
|
|
cpu_set_t cpuset;
|
||
|
|
CPU_ZERO(&cpuset);
|
||
|
|
CPU_SET(0, &cpuset);
|
||
|
|
if (sched_setaffinity(0, sizeof(cpuset), &cpuset) != 0)
|
||
|
|
err(1, "sched_setaffinity to CPU 0"); /* should never fail */
|
||
|
|
|
||
|
|
if (pthread_create(&thread, 0, threadproc, 0) != 0)
|
||
|
|
err(1, "pthread_create");
|
||
|
|
|
||
|
|
static unsigned long bases_with_hard_zero[] = {
|
||
|
|
0, HARD_ZERO, 1, 0x200000000,
|
||
|
|
};
|
||
|
|
|
||
|
|
for (int local = 0; local < 4; local++) {
|
||
|
|
for (int remote = 0; remote < 4; remote++) {
|
||
|
|
for (unsigned short s = 0; s < 5; s++) {
|
||
|
|
unsigned short sel = s;
|
||
|
|
if (s == 4)
|
||
|
|
asm ("mov %%ss, %0" : "=rm" (sel));
|
||
|
|
set_gs_and_switch_to(
|
||
|
|
bases_with_hard_zero[local],
|
||
|
|
sel,
|
||
|
|
bases_with_hard_zero[remote]);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
test_unexpected_base();
|
||
|
|
|
||
|
|
if (have_fsgsbase) {
|
||
|
|
unsigned short ss;
|
||
|
|
|
||
|
|
asm volatile ("mov %%ss, %0" : "=rm" (ss));
|
||
|
|
|
||
|
|
test_wrbase(0, 0);
|
||
|
|
test_wrbase(0, 1);
|
||
|
|
test_wrbase(0, 0x200000000);
|
||
|
|
test_wrbase(0, 0xffffffffffffffff);
|
||
|
|
test_wrbase(ss, 0);
|
||
|
|
test_wrbase(ss, 1);
|
||
|
|
test_wrbase(ss, 0x200000000);
|
||
|
|
test_wrbase(ss, 0xffffffffffffffff);
|
||
|
|
}
|
||
|
|
|
||
|
|
ftx = 3; /* Kill the thread. */
|
||
|
|
syscall(SYS_futex, &ftx, FUTEX_WAKE, 0, NULL, NULL, 0);
|
||
|
|
|
||
|
|
if (pthread_join(thread, NULL) != 0)
|
||
|
|
err(1, "pthread_join");
|
||
|
|
|
||
|
|
test_ptrace_write_gsbase();
|
||
|
|
|
||
|
|
return nerrs == 0 ? 0 : 1;
|
||
|
|
}
|