92 lines
3.3 KiB
JSON
92 lines
3.3 KiB
JSON
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[
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{
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"PEBS": "1",
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"PublicDescription": "",
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"EventCode": "0xC1",
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"Counter": "0,1,2,3",
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"UMask": "0x8",
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"Errata": "HSD56, HSM57",
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"EventName": "OTHER_ASSISTS.AVX_TO_SSE",
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"SampleAfterValue": "100003",
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"BriefDescription": "Number of transitions from AVX-256 to legacy SSE when penalty applicable",
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"CounterHTOff": "0,1,2,3,4,5,6,7"
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},
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{
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"PEBS": "1",
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"PublicDescription": "",
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"EventCode": "0xC1",
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"Counter": "0,1,2,3",
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"UMask": "0x10",
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"Errata": "HSD56, HSM57",
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"EventName": "OTHER_ASSISTS.SSE_TO_AVX",
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"SampleAfterValue": "100003",
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"BriefDescription": "Number of transitions from legacy SSE to AVX-256 when penalty applicable",
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"CounterHTOff": "0,1,2,3,4,5,6,7"
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},
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{
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"PublicDescription": "Note that a whole rep string only counts AVX_INST.ALL once.",
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"EventCode": "0xC6",
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"Counter": "0,1,2,3",
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"UMask": "0x7",
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"EventName": "AVX_INSTS.ALL",
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"SampleAfterValue": "2000003",
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"BriefDescription": "Approximate counts of AVX & AVX2 256-bit instructions, including non-arithmetic instructions, loads, and stores. May count non-AVX instructions that employ 256-bit operations, including (but not necessarily limited to) rep string instructions that use 256-bit loads and stores for optimized performance, XSAVE* and XRSTOR*, and operations that transition the x87 FPU data registers between x87 and MMX.",
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"CounterHTOff": "0,1,2,3,4,5,6,7"
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},
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{
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"PEBS": "1",
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"PublicDescription": "",
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"EventCode": "0xCA",
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"Counter": "0,1,2,3",
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"UMask": "0x2",
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"EventName": "FP_ASSIST.X87_OUTPUT",
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"SampleAfterValue": "100003",
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"BriefDescription": "output - Numeric Overflow, Numeric Underflow, Inexact Result",
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"CounterHTOff": "0,1,2,3,4,5,6,7"
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},
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{
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"PEBS": "1",
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"PublicDescription": "",
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"EventCode": "0xCA",
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"Counter": "0,1,2,3",
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"UMask": "0x4",
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"EventName": "FP_ASSIST.X87_INPUT",
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"SampleAfterValue": "100003",
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"BriefDescription": "input - Invalid Operation, Denormal Operand, SNaN Operand",
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"CounterHTOff": "0,1,2,3,4,5,6,7"
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},
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{
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"PEBS": "1",
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"PublicDescription": "",
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"EventCode": "0xCA",
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"Counter": "0,1,2,3",
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"UMask": "0x8",
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"EventName": "FP_ASSIST.SIMD_OUTPUT",
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"SampleAfterValue": "100003",
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"BriefDescription": "SSE* FP micro-code assist when output value is invalid.",
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"CounterHTOff": "0,1,2,3,4,5,6,7"
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},
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{
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"PEBS": "1",
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"PublicDescription": "",
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"EventCode": "0xCA",
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"Counter": "0,1,2,3",
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"UMask": "0x10",
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"EventName": "FP_ASSIST.SIMD_INPUT",
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"SampleAfterValue": "100003",
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"BriefDescription": "Any input SSE* FP Assist",
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"CounterHTOff": "0,1,2,3,4,5,6,7"
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},
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{
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"PEBS": "1",
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"PublicDescription": "",
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"EventCode": "0xCA",
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"Counter": "0,1,2,3",
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"UMask": "0x1e",
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"EventName": "FP_ASSIST.ANY",
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"SampleAfterValue": "100003",
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"BriefDescription": "Counts any FP_ASSIST umask was incrementing",
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"CounterMask": "1",
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"CounterHTOff": "0,1,2,3"
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}
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]
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