435 lines
12 KiB
C
435 lines
12 KiB
C
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Generic TXx9 ACLC platform driver
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*
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* Copyright (C) 2009 Atsushi Nemoto
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*
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* Based on RBTX49xx patch from CELF patch archive.
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* (C) Copyright TOSHIBA CORPORATION 2004-2006
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*/
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/scatterlist.h>
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#include <linux/slab.h>
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#include <linux/dmaengine.h>
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#include <sound/core.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/soc.h>
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#include "txx9aclc.h"
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#define DRV_NAME "txx9aclc"
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static struct txx9aclc_soc_device {
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struct txx9aclc_dmadata dmadata[2];
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} txx9aclc_soc_device;
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/* REVISIT: How to find txx9aclc_drvdata from snd_ac97? */
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static struct txx9aclc_plat_drvdata *txx9aclc_drvdata;
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static int txx9aclc_dma_init(struct txx9aclc_soc_device *dev,
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struct txx9aclc_dmadata *dmadata);
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static const struct snd_pcm_hardware txx9aclc_pcm_hardware = {
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/*
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* REVISIT: SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID
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* needs more works for noncoherent MIPS.
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*/
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.info = SNDRV_PCM_INFO_INTERLEAVED |
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SNDRV_PCM_INFO_BATCH |
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SNDRV_PCM_INFO_PAUSE,
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.period_bytes_min = 1024,
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.period_bytes_max = 8 * 1024,
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.periods_min = 2,
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.periods_max = 4096,
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.buffer_bytes_max = 32 * 1024,
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};
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static int txx9aclc_pcm_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params)
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{
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struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream);
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struct snd_pcm_runtime *runtime = substream->runtime;
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struct snd_soc_component *component = snd_soc_rtdcom_lookup(rtd, DRV_NAME);
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struct txx9aclc_dmadata *dmadata = runtime->private_data;
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int ret;
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ret = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(params));
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if (ret < 0)
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return ret;
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dev_dbg(component->dev,
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"runtime->dma_area = %#lx dma_addr = %#lx dma_bytes = %zd "
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"runtime->min_align %ld\n",
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(unsigned long)runtime->dma_area,
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(unsigned long)runtime->dma_addr, runtime->dma_bytes,
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runtime->min_align);
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dev_dbg(component->dev,
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"periods %d period_bytes %d stream %d\n",
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params_periods(params), params_period_bytes(params),
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substream->stream);
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dmadata->substream = substream;
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dmadata->pos = 0;
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return 0;
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}
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static int txx9aclc_pcm_hw_free(struct snd_pcm_substream *substream)
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{
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return snd_pcm_lib_free_pages(substream);
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}
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static int txx9aclc_pcm_prepare(struct snd_pcm_substream *substream)
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{
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struct snd_pcm_runtime *runtime = substream->runtime;
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struct txx9aclc_dmadata *dmadata = runtime->private_data;
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dmadata->dma_addr = runtime->dma_addr;
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dmadata->buffer_bytes = snd_pcm_lib_buffer_bytes(substream);
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dmadata->period_bytes = snd_pcm_lib_period_bytes(substream);
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if (dmadata->buffer_bytes == dmadata->period_bytes) {
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dmadata->frag_bytes = dmadata->period_bytes >> 1;
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dmadata->frags = 2;
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} else {
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dmadata->frag_bytes = dmadata->period_bytes;
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dmadata->frags = dmadata->buffer_bytes / dmadata->period_bytes;
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}
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dmadata->frag_count = 0;
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dmadata->pos = 0;
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return 0;
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}
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static void txx9aclc_dma_complete(void *arg)
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{
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struct txx9aclc_dmadata *dmadata = arg;
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unsigned long flags;
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/* dma completion handler cannot submit new operations */
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spin_lock_irqsave(&dmadata->dma_lock, flags);
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if (dmadata->frag_count >= 0) {
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dmadata->dmacount--;
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if (!WARN_ON(dmadata->dmacount < 0))
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tasklet_schedule(&dmadata->tasklet);
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}
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spin_unlock_irqrestore(&dmadata->dma_lock, flags);
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}
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static struct dma_async_tx_descriptor *
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txx9aclc_dma_submit(struct txx9aclc_dmadata *dmadata, dma_addr_t buf_dma_addr)
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{
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struct dma_chan *chan = dmadata->dma_chan;
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struct dma_async_tx_descriptor *desc;
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struct scatterlist sg;
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sg_init_table(&sg, 1);
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sg_set_page(&sg, pfn_to_page(PFN_DOWN(buf_dma_addr)),
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dmadata->frag_bytes, buf_dma_addr & (PAGE_SIZE - 1));
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sg_dma_address(&sg) = buf_dma_addr;
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desc = dmaengine_prep_slave_sg(chan, &sg, 1,
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dmadata->substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
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DMA_MEM_TO_DEV : DMA_DEV_TO_MEM,
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DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
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if (!desc) {
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dev_err(&chan->dev->device, "cannot prepare slave dma\n");
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return NULL;
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}
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desc->callback = txx9aclc_dma_complete;
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desc->callback_param = dmadata;
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dmaengine_submit(desc);
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return desc;
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}
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#define NR_DMA_CHAIN 2
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static void txx9aclc_dma_tasklet(unsigned long data)
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{
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struct txx9aclc_dmadata *dmadata = (struct txx9aclc_dmadata *)data;
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struct dma_chan *chan = dmadata->dma_chan;
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struct dma_async_tx_descriptor *desc;
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struct snd_pcm_substream *substream = dmadata->substream;
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u32 ctlbit = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
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ACCTL_AUDODMA : ACCTL_AUDIDMA;
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int i;
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unsigned long flags;
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spin_lock_irqsave(&dmadata->dma_lock, flags);
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if (dmadata->frag_count < 0) {
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struct txx9aclc_plat_drvdata *drvdata = txx9aclc_drvdata;
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void __iomem *base = drvdata->base;
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spin_unlock_irqrestore(&dmadata->dma_lock, flags);
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dmaengine_terminate_all(chan);
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/* first time */
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for (i = 0; i < NR_DMA_CHAIN; i++) {
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desc = txx9aclc_dma_submit(dmadata,
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dmadata->dma_addr + i * dmadata->frag_bytes);
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if (!desc)
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return;
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}
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dmadata->dmacount = NR_DMA_CHAIN;
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dma_async_issue_pending(chan);
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spin_lock_irqsave(&dmadata->dma_lock, flags);
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__raw_writel(ctlbit, base + ACCTLEN);
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dmadata->frag_count = NR_DMA_CHAIN % dmadata->frags;
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spin_unlock_irqrestore(&dmadata->dma_lock, flags);
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return;
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}
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if (WARN_ON(dmadata->dmacount >= NR_DMA_CHAIN)) {
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spin_unlock_irqrestore(&dmadata->dma_lock, flags);
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return;
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}
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while (dmadata->dmacount < NR_DMA_CHAIN) {
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dmadata->dmacount++;
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spin_unlock_irqrestore(&dmadata->dma_lock, flags);
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desc = txx9aclc_dma_submit(dmadata,
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dmadata->dma_addr +
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dmadata->frag_count * dmadata->frag_bytes);
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if (!desc)
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return;
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dma_async_issue_pending(chan);
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spin_lock_irqsave(&dmadata->dma_lock, flags);
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dmadata->frag_count++;
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dmadata->frag_count %= dmadata->frags;
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dmadata->pos += dmadata->frag_bytes;
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dmadata->pos %= dmadata->buffer_bytes;
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if ((dmadata->frag_count * dmadata->frag_bytes) %
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dmadata->period_bytes == 0)
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snd_pcm_period_elapsed(substream);
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}
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spin_unlock_irqrestore(&dmadata->dma_lock, flags);
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}
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static int txx9aclc_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
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{
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struct txx9aclc_dmadata *dmadata = substream->runtime->private_data;
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struct txx9aclc_plat_drvdata *drvdata = txx9aclc_drvdata;
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void __iomem *base = drvdata->base;
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unsigned long flags;
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int ret = 0;
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u32 ctlbit = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
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ACCTL_AUDODMA : ACCTL_AUDIDMA;
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spin_lock_irqsave(&dmadata->dma_lock, flags);
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switch (cmd) {
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case SNDRV_PCM_TRIGGER_START:
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dmadata->frag_count = -1;
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tasklet_schedule(&dmadata->tasklet);
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break;
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case SNDRV_PCM_TRIGGER_STOP:
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case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
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case SNDRV_PCM_TRIGGER_SUSPEND:
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__raw_writel(ctlbit, base + ACCTLDIS);
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break;
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case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
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case SNDRV_PCM_TRIGGER_RESUME:
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__raw_writel(ctlbit, base + ACCTLEN);
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break;
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default:
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ret = -EINVAL;
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}
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spin_unlock_irqrestore(&dmadata->dma_lock, flags);
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return ret;
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}
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static snd_pcm_uframes_t
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txx9aclc_pcm_pointer(struct snd_pcm_substream *substream)
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{
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struct txx9aclc_dmadata *dmadata = substream->runtime->private_data;
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return bytes_to_frames(substream->runtime, dmadata->pos);
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}
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static int txx9aclc_pcm_open(struct snd_pcm_substream *substream)
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{
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struct txx9aclc_soc_device *dev = &txx9aclc_soc_device;
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struct txx9aclc_dmadata *dmadata = &dev->dmadata[substream->stream];
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int ret;
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ret = snd_soc_set_runtime_hwparams(substream, &txx9aclc_pcm_hardware);
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if (ret)
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return ret;
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/* ensure that buffer size is a multiple of period size */
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ret = snd_pcm_hw_constraint_integer(substream->runtime,
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SNDRV_PCM_HW_PARAM_PERIODS);
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if (ret < 0)
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return ret;
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substream->runtime->private_data = dmadata;
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return 0;
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}
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static int txx9aclc_pcm_close(struct snd_pcm_substream *substream)
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{
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struct txx9aclc_dmadata *dmadata = substream->runtime->private_data;
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struct dma_chan *chan = dmadata->dma_chan;
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dmadata->frag_count = -1;
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dmaengine_terminate_all(chan);
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return 0;
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}
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static const struct snd_pcm_ops txx9aclc_pcm_ops = {
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.open = txx9aclc_pcm_open,
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.close = txx9aclc_pcm_close,
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.ioctl = snd_pcm_lib_ioctl,
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.hw_params = txx9aclc_pcm_hw_params,
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.hw_free = txx9aclc_pcm_hw_free,
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.prepare = txx9aclc_pcm_prepare,
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.trigger = txx9aclc_pcm_trigger,
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.pointer = txx9aclc_pcm_pointer,
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};
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static int txx9aclc_pcm_new(struct snd_soc_pcm_runtime *rtd)
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{
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struct snd_card *card = rtd->card->snd_card;
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struct snd_soc_dai *dai = rtd->cpu_dai;
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struct snd_pcm *pcm = rtd->pcm;
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struct snd_soc_component *component = snd_soc_rtdcom_lookup(rtd, DRV_NAME);
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struct platform_device *pdev = to_platform_device(component->dev);
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struct txx9aclc_soc_device *dev;
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struct resource *r;
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int i;
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int ret;
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/* at this point onwards the AC97 component has probed and this will be valid */
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dev = snd_soc_dai_get_drvdata(dai);
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dev->dmadata[0].stream = SNDRV_PCM_STREAM_PLAYBACK;
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dev->dmadata[1].stream = SNDRV_PCM_STREAM_CAPTURE;
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for (i = 0; i < 2; i++) {
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r = platform_get_resource(pdev, IORESOURCE_DMA, i);
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if (!r) {
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ret = -EBUSY;
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goto exit;
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}
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dev->dmadata[i].dma_res = r;
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ret = txx9aclc_dma_init(dev, &dev->dmadata[i]);
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if (ret)
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goto exit;
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}
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snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
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card->dev, 64 * 1024, 4 * 1024 * 1024);
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return 0;
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exit:
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for (i = 0; i < 2; i++) {
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if (dev->dmadata[i].dma_chan)
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dma_release_channel(dev->dmadata[i].dma_chan);
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dev->dmadata[i].dma_chan = NULL;
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}
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return ret;
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}
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static bool filter(struct dma_chan *chan, void *param)
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{
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struct txx9aclc_dmadata *dmadata = param;
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char *devname;
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bool found = false;
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devname = kasprintf(GFP_KERNEL, "%s.%d", dmadata->dma_res->name,
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(int)dmadata->dma_res->start);
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if (strcmp(dev_name(chan->device->dev), devname) == 0) {
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chan->private = &dmadata->dma_slave;
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found = true;
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}
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kfree(devname);
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return found;
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}
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static int txx9aclc_dma_init(struct txx9aclc_soc_device *dev,
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struct txx9aclc_dmadata *dmadata)
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{
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struct txx9aclc_plat_drvdata *drvdata = txx9aclc_drvdata;
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struct txx9dmac_slave *ds = &dmadata->dma_slave;
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dma_cap_mask_t mask;
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spin_lock_init(&dmadata->dma_lock);
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ds->reg_width = sizeof(u32);
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if (dmadata->stream == SNDRV_PCM_STREAM_PLAYBACK) {
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ds->tx_reg = drvdata->physbase + ACAUDODAT;
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ds->rx_reg = 0;
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} else {
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ds->tx_reg = 0;
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ds->rx_reg = drvdata->physbase + ACAUDIDAT;
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}
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/* Try to grab a DMA channel */
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dma_cap_zero(mask);
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dma_cap_set(DMA_SLAVE, mask);
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dmadata->dma_chan = dma_request_channel(mask, filter, dmadata);
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if (!dmadata->dma_chan) {
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printk(KERN_ERR
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"DMA channel for %s is not available\n",
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dmadata->stream == SNDRV_PCM_STREAM_PLAYBACK ?
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"playback" : "capture");
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return -EBUSY;
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}
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tasklet_init(&dmadata->tasklet, txx9aclc_dma_tasklet,
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(unsigned long)dmadata);
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return 0;
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}
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static int txx9aclc_pcm_probe(struct snd_soc_component *component)
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{
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snd_soc_component_set_drvdata(component, &txx9aclc_soc_device);
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return 0;
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}
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static void txx9aclc_pcm_remove(struct snd_soc_component *component)
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{
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struct txx9aclc_soc_device *dev = snd_soc_component_get_drvdata(component);
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struct txx9aclc_plat_drvdata *drvdata = txx9aclc_drvdata;
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void __iomem *base = drvdata->base;
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int i;
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/* disable all FIFO DMAs */
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__raw_writel(ACCTL_AUDODMA | ACCTL_AUDIDMA, base + ACCTLDIS);
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/* dummy R/W to clear pending DMAREQ if any */
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__raw_writel(__raw_readl(base + ACAUDIDAT), base + ACAUDODAT);
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for (i = 0; i < 2; i++) {
|
||
|
struct txx9aclc_dmadata *dmadata = &dev->dmadata[i];
|
||
|
struct dma_chan *chan = dmadata->dma_chan;
|
||
|
|
||
|
if (chan) {
|
||
|
dmadata->frag_count = -1;
|
||
|
dmaengine_terminate_all(chan);
|
||
|
dma_release_channel(chan);
|
||
|
}
|
||
|
dev->dmadata[i].dma_chan = NULL;
|
||
|
}
|
||
|
}
|
||
|
|
||
|
static const struct snd_soc_component_driver txx9aclc_soc_component = {
|
||
|
.name = DRV_NAME,
|
||
|
.probe = txx9aclc_pcm_probe,
|
||
|
.remove = txx9aclc_pcm_remove,
|
||
|
.ops = &txx9aclc_pcm_ops,
|
||
|
.pcm_new = txx9aclc_pcm_new,
|
||
|
};
|
||
|
|
||
|
static int txx9aclc_soc_platform_probe(struct platform_device *pdev)
|
||
|
{
|
||
|
return devm_snd_soc_register_component(&pdev->dev,
|
||
|
&txx9aclc_soc_component, NULL, 0);
|
||
|
}
|
||
|
|
||
|
static struct platform_driver txx9aclc_pcm_driver = {
|
||
|
.driver = {
|
||
|
.name = "txx9aclc-pcm-audio",
|
||
|
},
|
||
|
|
||
|
.probe = txx9aclc_soc_platform_probe,
|
||
|
};
|
||
|
|
||
|
module_platform_driver(txx9aclc_pcm_driver);
|
||
|
|
||
|
MODULE_AUTHOR("Atsushi Nemoto <anemo@mba.ocn.ne.jp>");
|
||
|
MODULE_DESCRIPTION("TXx9 ACLC Audio DMA driver");
|
||
|
MODULE_LICENSE("GPL");
|