121 lines
2.5 KiB
C
121 lines
2.5 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* soc-intel-quirks.h - prototypes for quirk autodetection
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*
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* Copyright (c) 2019, Intel Corporation.
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*
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*/
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#ifndef _SND_SOC_INTEL_QUIRKS_H
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#define _SND_SOC_INTEL_QUIRKS_H
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#if IS_ENABLED(CONFIG_X86)
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#include <asm/cpu_device_id.h>
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#include <asm/intel-family.h>
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#include <asm/iosf_mbi.h>
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#define ICPU(model) { X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, }
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#define SOC_INTEL_IS_CPU(soc, type) \
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static inline bool soc_intel_is_##soc(void) \
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{ \
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static const struct x86_cpu_id soc##_cpu_ids[] = { \
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ICPU(type), \
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{} \
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}; \
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const struct x86_cpu_id *id; \
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\
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id = x86_match_cpu(soc##_cpu_ids); \
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if (id) \
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return true; \
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return false; \
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}
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SOC_INTEL_IS_CPU(byt, INTEL_FAM6_ATOM_SILVERMONT);
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SOC_INTEL_IS_CPU(cht, INTEL_FAM6_ATOM_AIRMONT);
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SOC_INTEL_IS_CPU(apl, INTEL_FAM6_ATOM_GOLDMONT);
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SOC_INTEL_IS_CPU(glk, INTEL_FAM6_ATOM_GOLDMONT_PLUS);
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SOC_INTEL_IS_CPU(cml, INTEL_FAM6_KABYLAKE_L);
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static inline bool soc_intel_is_byt_cr(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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int status = 0;
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if (!soc_intel_is_byt())
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return false;
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if (iosf_mbi_available()) {
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u32 bios_status;
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status = iosf_mbi_read(BT_MBI_UNIT_PMC, /* 0x04 PUNIT */
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MBI_REG_READ, /* 0x10 */
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0x006, /* BIOS_CONFIG */
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&bios_status);
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if (status) {
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dev_err(dev, "could not read PUNIT BIOS_CONFIG\n");
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} else {
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/* bits 26:27 mirror PMIC options */
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bios_status = (bios_status >> 26) & 3;
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if (bios_status == 1 || bios_status == 3) {
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dev_info(dev, "Detected Baytrail-CR platform\n");
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return true;
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}
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dev_info(dev, "BYT-CR not detected\n");
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}
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} else {
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dev_info(dev, "IOSF_MBI not available, no BYT-CR detection\n");
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}
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if (!platform_get_resource(pdev, IORESOURCE_IRQ, 5)) {
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/*
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* Some devices detected as BYT-T have only a single IRQ listed,
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* causing platform_get_irq with index 5 to return -ENXIO.
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* The correct IRQ in this case is at index 0, as on BYT-CR.
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*/
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dev_info(dev, "Falling back to Baytrail-CR platform\n");
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return true;
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}
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return false;
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}
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#else
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static inline bool soc_intel_is_byt_cr(struct platform_device *pdev)
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{
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return false;
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}
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static inline bool soc_intel_is_byt(void)
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{
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return false;
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}
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static inline bool soc_intel_is_cht(void)
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{
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return false;
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}
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static inline bool soc_intel_is_apl(void)
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{
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return false;
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}
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static inline bool soc_intel_is_glk(void)
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{
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return false;
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}
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static inline bool soc_intel_is_cml(void)
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{
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return false;
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}
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#endif
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#endif /* _SND_SOC_INTEL_QUIRKS_H */
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