472 lines
13 KiB
C
472 lines
13 KiB
C
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* cht_bsw_rt5672.c - ASoc Machine driver for Intel Cherryview-based platforms
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* Cherrytrail and Braswell, with RT5672 codec.
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*
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* Copyright (C) 2014 Intel Corp
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* Author: Subhransu S. Prusty <subhransu.s.prusty@intel.com>
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* Mengdong Lin <mengdong.lin@intel.com>
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*/
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#include <linux/gpio/consumer.h>
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#include <linux/input.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include <linux/clk.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/soc.h>
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#include <sound/jack.h>
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#include <sound/soc-acpi.h>
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#include "../../codecs/rt5670.h"
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#include "../atom/sst-atom-controls.h"
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/* The platform clock #3 outputs 19.2Mhz clock to codec as I2S MCLK */
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#define CHT_PLAT_CLK_3_HZ 19200000
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#define CHT_CODEC_DAI "rt5670-aif1"
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struct cht_mc_private {
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struct snd_soc_jack headset;
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char codec_name[SND_ACPI_I2C_ID_LEN];
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struct clk *mclk;
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};
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/* Headset jack detection DAPM pins */
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static struct snd_soc_jack_pin cht_bsw_headset_pins[] = {
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{
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.pin = "Headset Mic",
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.mask = SND_JACK_MICROPHONE,
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},
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{
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.pin = "Headphone",
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.mask = SND_JACK_HEADPHONE,
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},
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};
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static int platform_clock_control(struct snd_soc_dapm_widget *w,
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struct snd_kcontrol *k, int event)
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{
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struct snd_soc_dapm_context *dapm = w->dapm;
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struct snd_soc_card *card = dapm->card;
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struct snd_soc_dai *codec_dai;
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struct cht_mc_private *ctx = snd_soc_card_get_drvdata(card);
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int ret;
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codec_dai = snd_soc_card_get_codec_dai(card, CHT_CODEC_DAI);
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if (!codec_dai) {
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dev_err(card->dev, "Codec dai not found; Unable to set platform clock\n");
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return -EIO;
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}
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if (SND_SOC_DAPM_EVENT_ON(event)) {
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if (ctx->mclk) {
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ret = clk_prepare_enable(ctx->mclk);
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if (ret < 0) {
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dev_err(card->dev,
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"could not configure MCLK state");
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return ret;
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}
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}
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/* set codec PLL source to the 19.2MHz platform clock (MCLK) */
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ret = snd_soc_dai_set_pll(codec_dai, 0, RT5670_PLL1_S_MCLK,
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CHT_PLAT_CLK_3_HZ, 48000 * 512);
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if (ret < 0) {
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dev_err(card->dev, "can't set codec pll: %d\n", ret);
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return ret;
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}
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/* set codec sysclk source to PLL */
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ret = snd_soc_dai_set_sysclk(codec_dai, RT5670_SCLK_S_PLL1,
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48000 * 512, SND_SOC_CLOCK_IN);
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if (ret < 0) {
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dev_err(card->dev, "can't set codec sysclk: %d\n", ret);
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return ret;
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}
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} else {
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/* Set codec sysclk source to its internal clock because codec
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* PLL will be off when idle and MCLK will also be off by ACPI
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* when codec is runtime suspended. Codec needs clock for jack
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* detection and button press.
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*/
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snd_soc_dai_set_sysclk(codec_dai, RT5670_SCLK_S_RCCLK,
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48000 * 512, SND_SOC_CLOCK_IN);
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if (ctx->mclk)
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clk_disable_unprepare(ctx->mclk);
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}
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return 0;
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}
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static const struct snd_soc_dapm_widget cht_dapm_widgets[] = {
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SND_SOC_DAPM_HP("Headphone", NULL),
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SND_SOC_DAPM_MIC("Headset Mic", NULL),
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SND_SOC_DAPM_MIC("Int Mic", NULL),
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SND_SOC_DAPM_SPK("Ext Spk", NULL),
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SND_SOC_DAPM_SUPPLY("Platform Clock", SND_SOC_NOPM, 0, 0,
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platform_clock_control, SND_SOC_DAPM_PRE_PMU |
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SND_SOC_DAPM_POST_PMD),
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};
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static const struct snd_soc_dapm_route cht_audio_map[] = {
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{"IN1P", NULL, "Headset Mic"},
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{"IN1N", NULL, "Headset Mic"},
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{"DMIC L1", NULL, "Int Mic"},
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{"DMIC R1", NULL, "Int Mic"},
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{"Headphone", NULL, "HPOL"},
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{"Headphone", NULL, "HPOR"},
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{"Ext Spk", NULL, "SPOLP"},
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{"Ext Spk", NULL, "SPOLN"},
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{"Ext Spk", NULL, "SPORP"},
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{"Ext Spk", NULL, "SPORN"},
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{"AIF1 Playback", NULL, "ssp2 Tx"},
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{"ssp2 Tx", NULL, "codec_out0"},
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{"ssp2 Tx", NULL, "codec_out1"},
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{"codec_in0", NULL, "ssp2 Rx"},
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{"codec_in1", NULL, "ssp2 Rx"},
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{"ssp2 Rx", NULL, "AIF1 Capture"},
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{"Headphone", NULL, "Platform Clock"},
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{"Headset Mic", NULL, "Platform Clock"},
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{"Int Mic", NULL, "Platform Clock"},
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{"Ext Spk", NULL, "Platform Clock"},
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};
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static const struct snd_kcontrol_new cht_mc_controls[] = {
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SOC_DAPM_PIN_SWITCH("Headphone"),
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SOC_DAPM_PIN_SWITCH("Headset Mic"),
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SOC_DAPM_PIN_SWITCH("Int Mic"),
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SOC_DAPM_PIN_SWITCH("Ext Spk"),
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};
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static int cht_aif1_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params)
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{
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struct snd_soc_pcm_runtime *rtd = substream->private_data;
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struct snd_soc_dai *codec_dai = rtd->codec_dai;
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int ret;
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/* set codec PLL source to the 19.2MHz platform clock (MCLK) */
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ret = snd_soc_dai_set_pll(codec_dai, 0, RT5670_PLL1_S_MCLK,
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CHT_PLAT_CLK_3_HZ, params_rate(params) * 512);
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if (ret < 0) {
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dev_err(rtd->dev, "can't set codec pll: %d\n", ret);
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return ret;
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}
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/* set codec sysclk source to PLL */
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ret = snd_soc_dai_set_sysclk(codec_dai, RT5670_SCLK_S_PLL1,
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params_rate(params) * 512,
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SND_SOC_CLOCK_IN);
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if (ret < 0) {
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dev_err(rtd->dev, "can't set codec sysclk: %d\n", ret);
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return ret;
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}
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return 0;
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}
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static const struct acpi_gpio_params headset_gpios = { 0, 0, false };
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static const struct acpi_gpio_mapping cht_rt5672_gpios[] = {
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{ "headset-gpios", &headset_gpios, 1 },
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{},
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};
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static int cht_codec_init(struct snd_soc_pcm_runtime *runtime)
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{
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int ret;
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struct snd_soc_dai *codec_dai = runtime->codec_dai;
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struct snd_soc_component *component = codec_dai->component;
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struct cht_mc_private *ctx = snd_soc_card_get_drvdata(runtime->card);
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if (devm_acpi_dev_add_driver_gpios(component->dev, cht_rt5672_gpios))
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dev_warn(runtime->dev, "Unable to add GPIO mapping table\n");
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/* Select codec ASRC clock source to track I2S1 clock, because codec
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* is in slave mode and 100fs I2S format (BCLK = 100 * LRCLK) cannot
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* be supported by RT5672. Otherwise, ASRC will be disabled and cause
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* noise.
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*/
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rt5670_sel_asrc_clk_src(component,
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RT5670_DA_STEREO_FILTER
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| RT5670_DA_MONO_L_FILTER
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| RT5670_DA_MONO_R_FILTER
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| RT5670_AD_STEREO_FILTER
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| RT5670_AD_MONO_L_FILTER
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| RT5670_AD_MONO_R_FILTER,
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RT5670_CLK_SEL_I2S1_ASRC);
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ret = snd_soc_card_jack_new(runtime->card, "Headset",
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SND_JACK_HEADSET | SND_JACK_BTN_0 |
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SND_JACK_BTN_1 | SND_JACK_BTN_2,
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&ctx->headset,
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cht_bsw_headset_pins,
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ARRAY_SIZE(cht_bsw_headset_pins));
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if (ret)
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return ret;
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snd_jack_set_key(ctx->headset.jack, SND_JACK_BTN_0, KEY_PLAYPAUSE);
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snd_jack_set_key(ctx->headset.jack, SND_JACK_BTN_1, KEY_VOLUMEUP);
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snd_jack_set_key(ctx->headset.jack, SND_JACK_BTN_2, KEY_VOLUMEDOWN);
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rt5670_set_jack_detect(component, &ctx->headset);
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if (ctx->mclk) {
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/*
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* The firmware might enable the clock at
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* boot (this information may or may not
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* be reflected in the enable clock register).
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* To change the rate we must disable the clock
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* first to cover these cases. Due to common
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* clock framework restrictions that do not allow
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* to disable a clock that has not been enabled,
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* we need to enable the clock first.
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*/
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ret = clk_prepare_enable(ctx->mclk);
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if (!ret)
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clk_disable_unprepare(ctx->mclk);
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ret = clk_set_rate(ctx->mclk, CHT_PLAT_CLK_3_HZ);
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if (ret) {
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dev_err(runtime->dev, "unable to set MCLK rate\n");
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return ret;
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}
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}
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return 0;
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}
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static int cht_codec_fixup(struct snd_soc_pcm_runtime *rtd,
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struct snd_pcm_hw_params *params)
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{
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struct snd_interval *rate = hw_param_interval(params,
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SNDRV_PCM_HW_PARAM_RATE);
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struct snd_interval *channels = hw_param_interval(params,
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SNDRV_PCM_HW_PARAM_CHANNELS);
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int ret;
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/* The DSP will covert the FE rate to 48k, stereo, 24bits */
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rate->min = rate->max = 48000;
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channels->min = channels->max = 2;
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/* set SSP2 to 24-bit */
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params_set_format(params, SNDRV_PCM_FORMAT_S24_LE);
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/*
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* Default mode for SSP configuration is TDM 4 slot
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*/
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ret = snd_soc_dai_set_fmt(rtd->codec_dai,
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SND_SOC_DAIFMT_DSP_B |
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SND_SOC_DAIFMT_IB_NF |
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SND_SOC_DAIFMT_CBS_CFS);
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if (ret < 0) {
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dev_err(rtd->dev, "can't set format to TDM %d\n", ret);
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return ret;
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}
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/* TDM 4 slots 24 bit, set Rx & Tx bitmask to 4 active slots */
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ret = snd_soc_dai_set_tdm_slot(rtd->codec_dai, 0xF, 0xF, 4, 24);
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if (ret < 0) {
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dev_err(rtd->dev, "can't set codec TDM slot %d\n", ret);
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return ret;
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}
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return 0;
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}
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static int cht_aif1_startup(struct snd_pcm_substream *substream)
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{
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return snd_pcm_hw_constraint_single(substream->runtime,
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SNDRV_PCM_HW_PARAM_RATE, 48000);
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}
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static const struct snd_soc_ops cht_aif1_ops = {
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.startup = cht_aif1_startup,
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};
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static const struct snd_soc_ops cht_be_ssp2_ops = {
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.hw_params = cht_aif1_hw_params,
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};
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SND_SOC_DAILINK_DEF(dummy,
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DAILINK_COMP_ARRAY(COMP_DUMMY()));
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SND_SOC_DAILINK_DEF(media,
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DAILINK_COMP_ARRAY(COMP_CPU("media-cpu-dai")));
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SND_SOC_DAILINK_DEF(deepbuffer,
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DAILINK_COMP_ARRAY(COMP_CPU("deepbuffer-cpu-dai")));
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SND_SOC_DAILINK_DEF(ssp2_port,
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DAILINK_COMP_ARRAY(COMP_CPU("ssp2-port")));
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SND_SOC_DAILINK_DEF(ssp2_codec,
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DAILINK_COMP_ARRAY(COMP_CODEC("i2c-10EC5670:00",
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"rt5670-aif1")));
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SND_SOC_DAILINK_DEF(platform,
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DAILINK_COMP_ARRAY(COMP_PLATFORM("sst-mfld-platform")));
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static struct snd_soc_dai_link cht_dailink[] = {
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/* Front End DAI links */
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[MERR_DPCM_AUDIO] = {
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.name = "Audio Port",
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.stream_name = "Audio",
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.nonatomic = true,
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.dynamic = 1,
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.dpcm_playback = 1,
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.dpcm_capture = 1,
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.ops = &cht_aif1_ops,
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SND_SOC_DAILINK_REG(media, dummy, platform),
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},
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[MERR_DPCM_DEEP_BUFFER] = {
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.name = "Deep-Buffer Audio Port",
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.stream_name = "Deep-Buffer Audio",
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.nonatomic = true,
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.dynamic = 1,
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.dpcm_playback = 1,
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.ops = &cht_aif1_ops,
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SND_SOC_DAILINK_REG(deepbuffer, dummy, platform),
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},
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/* Back End DAI links */
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{
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/* SSP2 - Codec */
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.name = "SSP2-Codec",
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.id = 0,
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.no_pcm = 1,
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.nonatomic = true,
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.init = cht_codec_init,
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.be_hw_params_fixup = cht_codec_fixup,
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.dpcm_playback = 1,
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||
|
|
.dpcm_capture = 1,
|
||
|
|
.ops = &cht_be_ssp2_ops,
|
||
|
|
SND_SOC_DAILINK_REG(ssp2_port, ssp2_codec, platform),
|
||
|
|
},
|
||
|
|
};
|
||
|
|
|
||
|
|
static int cht_suspend_pre(struct snd_soc_card *card)
|
||
|
|
{
|
||
|
|
struct snd_soc_component *component;
|
||
|
|
struct cht_mc_private *ctx = snd_soc_card_get_drvdata(card);
|
||
|
|
|
||
|
|
for_each_card_components(card, component) {
|
||
|
|
if (!strncmp(component->name,
|
||
|
|
ctx->codec_name, sizeof(ctx->codec_name))) {
|
||
|
|
|
||
|
|
dev_dbg(component->dev, "disabling jack detect before going to suspend.\n");
|
||
|
|
rt5670_jack_suspend(component);
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
static int cht_resume_post(struct snd_soc_card *card)
|
||
|
|
{
|
||
|
|
struct snd_soc_component *component;
|
||
|
|
struct cht_mc_private *ctx = snd_soc_card_get_drvdata(card);
|
||
|
|
|
||
|
|
for_each_card_components(card, component) {
|
||
|
|
if (!strncmp(component->name,
|
||
|
|
ctx->codec_name, sizeof(ctx->codec_name))) {
|
||
|
|
|
||
|
|
dev_dbg(component->dev, "enabling jack detect for resume.\n");
|
||
|
|
rt5670_jack_resume(component);
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
/* SoC card */
|
||
|
|
static struct snd_soc_card snd_soc_card_cht = {
|
||
|
|
.name = "cht-bsw-rt5672",
|
||
|
|
.owner = THIS_MODULE,
|
||
|
|
.dai_link = cht_dailink,
|
||
|
|
.num_links = ARRAY_SIZE(cht_dailink),
|
||
|
|
.dapm_widgets = cht_dapm_widgets,
|
||
|
|
.num_dapm_widgets = ARRAY_SIZE(cht_dapm_widgets),
|
||
|
|
.dapm_routes = cht_audio_map,
|
||
|
|
.num_dapm_routes = ARRAY_SIZE(cht_audio_map),
|
||
|
|
.controls = cht_mc_controls,
|
||
|
|
.num_controls = ARRAY_SIZE(cht_mc_controls),
|
||
|
|
.suspend_pre = cht_suspend_pre,
|
||
|
|
.resume_post = cht_resume_post,
|
||
|
|
};
|
||
|
|
|
||
|
|
#define RT5672_I2C_DEFAULT "i2c-10EC5670:00"
|
||
|
|
|
||
|
|
static int snd_cht_mc_probe(struct platform_device *pdev)
|
||
|
|
{
|
||
|
|
int ret_val = 0;
|
||
|
|
struct cht_mc_private *drv;
|
||
|
|
struct snd_soc_acpi_mach *mach = pdev->dev.platform_data;
|
||
|
|
const char *platform_name;
|
||
|
|
struct acpi_device *adev;
|
||
|
|
int i;
|
||
|
|
|
||
|
|
drv = devm_kzalloc(&pdev->dev, sizeof(*drv), GFP_KERNEL);
|
||
|
|
if (!drv)
|
||
|
|
return -ENOMEM;
|
||
|
|
|
||
|
|
strcpy(drv->codec_name, RT5672_I2C_DEFAULT);
|
||
|
|
|
||
|
|
/* fixup codec name based on HID */
|
||
|
|
adev = acpi_dev_get_first_match_dev(mach->id, NULL, -1);
|
||
|
|
if (adev) {
|
||
|
|
snprintf(drv->codec_name, sizeof(drv->codec_name),
|
||
|
|
"i2c-%s", acpi_dev_name(adev));
|
||
|
|
put_device(&adev->dev);
|
||
|
|
for (i = 0; i < ARRAY_SIZE(cht_dailink); i++) {
|
||
|
|
if (!strcmp(cht_dailink[i].codecs->name,
|
||
|
|
RT5672_I2C_DEFAULT)) {
|
||
|
|
cht_dailink[i].codecs->name = drv->codec_name;
|
||
|
|
break;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
/* override plaform name, if required */
|
||
|
|
snd_soc_card_cht.dev = &pdev->dev;
|
||
|
|
platform_name = mach->mach_params.platform;
|
||
|
|
|
||
|
|
ret_val = snd_soc_fixup_dai_links_platform_name(&snd_soc_card_cht,
|
||
|
|
platform_name);
|
||
|
|
if (ret_val)
|
||
|
|
return ret_val;
|
||
|
|
|
||
|
|
drv->mclk = devm_clk_get(&pdev->dev, "pmc_plt_clk_3");
|
||
|
|
if (IS_ERR(drv->mclk)) {
|
||
|
|
dev_err(&pdev->dev,
|
||
|
|
"Failed to get MCLK from pmc_plt_clk_3: %ld\n",
|
||
|
|
PTR_ERR(drv->mclk));
|
||
|
|
return PTR_ERR(drv->mclk);
|
||
|
|
}
|
||
|
|
snd_soc_card_set_drvdata(&snd_soc_card_cht, drv);
|
||
|
|
|
||
|
|
/* register the soc card */
|
||
|
|
ret_val = devm_snd_soc_register_card(&pdev->dev, &snd_soc_card_cht);
|
||
|
|
if (ret_val) {
|
||
|
|
dev_err(&pdev->dev,
|
||
|
|
"snd_soc_register_card failed %d\n", ret_val);
|
||
|
|
return ret_val;
|
||
|
|
}
|
||
|
|
platform_set_drvdata(pdev, &snd_soc_card_cht);
|
||
|
|
return ret_val;
|
||
|
|
}
|
||
|
|
|
||
|
|
static struct platform_driver snd_cht_mc_driver = {
|
||
|
|
.driver = {
|
||
|
|
.name = "cht-bsw-rt5672",
|
||
|
|
},
|
||
|
|
.probe = snd_cht_mc_probe,
|
||
|
|
};
|
||
|
|
|
||
|
|
module_platform_driver(snd_cht_mc_driver);
|
||
|
|
|
||
|
|
MODULE_DESCRIPTION("ASoC Intel(R) Baytrail CR Machine driver");
|
||
|
|
MODULE_AUTHOR("Subhransu S. Prusty, Mengdong Lin");
|
||
|
|
MODULE_LICENSE("GPL v2");
|
||
|
|
MODULE_ALIAS("platform:cht-bsw-rt5672");
|