159 lines
7.2 KiB
C
159 lines
7.2 KiB
C
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Platform data for WM8904
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*
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* Copyright 2009 Wolfson Microelectronics PLC.
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*
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* Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
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*/
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#ifndef __MFD_WM8994_PDATA_H__
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#define __MFD_WM8994_PDATA_H__
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/* Used to enable configuration of a GPIO to all zeros */
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#define WM8904_GPIO_NO_CONFIG 0x8000
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/*
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* R6 (0x06) - Mic Bias Control 0
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*/
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#define WM8904_MICDET_THR_MASK 0x0070 /* MICDET_THR - [6:4] */
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#define WM8904_MICDET_THR_SHIFT 4 /* MICDET_THR - [6:4] */
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#define WM8904_MICDET_THR_WIDTH 3 /* MICDET_THR - [6:4] */
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#define WM8904_MICSHORT_THR_MASK 0x000C /* MICSHORT_THR - [3:2] */
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#define WM8904_MICSHORT_THR_SHIFT 2 /* MICSHORT_THR - [3:2] */
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#define WM8904_MICSHORT_THR_WIDTH 2 /* MICSHORT_THR - [3:2] */
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#define WM8904_MICDET_ENA 0x0002 /* MICDET_ENA */
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#define WM8904_MICDET_ENA_MASK 0x0002 /* MICDET_ENA */
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#define WM8904_MICDET_ENA_SHIFT 1 /* MICDET_ENA */
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#define WM8904_MICDET_ENA_WIDTH 1 /* MICDET_ENA */
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#define WM8904_MICBIAS_ENA 0x0001 /* MICBIAS_ENA */
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#define WM8904_MICBIAS_ENA_MASK 0x0001 /* MICBIAS_ENA */
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#define WM8904_MICBIAS_ENA_SHIFT 0 /* MICBIAS_ENA */
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#define WM8904_MICBIAS_ENA_WIDTH 1 /* MICBIAS_ENA */
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/*
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* R7 (0x07) - Mic Bias Control 1
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*/
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#define WM8904_MIC_DET_FILTER_ENA 0x8000 /* MIC_DET_FILTER_ENA */
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#define WM8904_MIC_DET_FILTER_ENA_MASK 0x8000 /* MIC_DET_FILTER_ENA */
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#define WM8904_MIC_DET_FILTER_ENA_SHIFT 15 /* MIC_DET_FILTER_ENA */
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#define WM8904_MIC_DET_FILTER_ENA_WIDTH 1 /* MIC_DET_FILTER_ENA */
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#define WM8904_MIC_SHORT_FILTER_ENA 0x4000 /* MIC_SHORT_FILTER_ENA */
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#define WM8904_MIC_SHORT_FILTER_ENA_MASK 0x4000 /* MIC_SHORT_FILTER_ENA */
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#define WM8904_MIC_SHORT_FILTER_ENA_SHIFT 14 /* MIC_SHORT_FILTER_ENA */
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#define WM8904_MIC_SHORT_FILTER_ENA_WIDTH 1 /* MIC_SHORT_FILTER_ENA */
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#define WM8904_MICBIAS_SEL_MASK 0x0007 /* MICBIAS_SEL - [2:0] */
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#define WM8904_MICBIAS_SEL_SHIFT 0 /* MICBIAS_SEL - [2:0] */
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#define WM8904_MICBIAS_SEL_WIDTH 3 /* MICBIAS_SEL - [2:0] */
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/*
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* R121 (0x79) - GPIO Control 1
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*/
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#define WM8904_GPIO1_PU 0x0020 /* GPIO1_PU */
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#define WM8904_GPIO1_PU_MASK 0x0020 /* GPIO1_PU */
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#define WM8904_GPIO1_PU_SHIFT 5 /* GPIO1_PU */
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#define WM8904_GPIO1_PU_WIDTH 1 /* GPIO1_PU */
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#define WM8904_GPIO1_PD 0x0010 /* GPIO1_PD */
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#define WM8904_GPIO1_PD_MASK 0x0010 /* GPIO1_PD */
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#define WM8904_GPIO1_PD_SHIFT 4 /* GPIO1_PD */
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#define WM8904_GPIO1_PD_WIDTH 1 /* GPIO1_PD */
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#define WM8904_GPIO1_SEL_MASK 0x000F /* GPIO1_SEL - [3:0] */
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#define WM8904_GPIO1_SEL_SHIFT 0 /* GPIO1_SEL - [3:0] */
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#define WM8904_GPIO1_SEL_WIDTH 4 /* GPIO1_SEL - [3:0] */
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/*
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* R122 (0x7A) - GPIO Control 2
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*/
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#define WM8904_GPIO2_PU 0x0020 /* GPIO2_PU */
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#define WM8904_GPIO2_PU_MASK 0x0020 /* GPIO2_PU */
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#define WM8904_GPIO2_PU_SHIFT 5 /* GPIO2_PU */
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#define WM8904_GPIO2_PU_WIDTH 1 /* GPIO2_PU */
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#define WM8904_GPIO2_PD 0x0010 /* GPIO2_PD */
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#define WM8904_GPIO2_PD_MASK 0x0010 /* GPIO2_PD */
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#define WM8904_GPIO2_PD_SHIFT 4 /* GPIO2_PD */
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#define WM8904_GPIO2_PD_WIDTH 1 /* GPIO2_PD */
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#define WM8904_GPIO2_SEL_MASK 0x000F /* GPIO2_SEL - [3:0] */
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#define WM8904_GPIO2_SEL_SHIFT 0 /* GPIO2_SEL - [3:0] */
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#define WM8904_GPIO2_SEL_WIDTH 4 /* GPIO2_SEL - [3:0] */
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/*
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* R123 (0x7B) - GPIO Control 3
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*/
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#define WM8904_GPIO3_PU 0x0020 /* GPIO3_PU */
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#define WM8904_GPIO3_PU_MASK 0x0020 /* GPIO3_PU */
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#define WM8904_GPIO3_PU_SHIFT 5 /* GPIO3_PU */
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#define WM8904_GPIO3_PU_WIDTH 1 /* GPIO3_PU */
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#define WM8904_GPIO3_PD 0x0010 /* GPIO3_PD */
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#define WM8904_GPIO3_PD_MASK 0x0010 /* GPIO3_PD */
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#define WM8904_GPIO3_PD_SHIFT 4 /* GPIO3_PD */
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#define WM8904_GPIO3_PD_WIDTH 1 /* GPIO3_PD */
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#define WM8904_GPIO3_SEL_MASK 0x000F /* GPIO3_SEL - [3:0] */
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#define WM8904_GPIO3_SEL_SHIFT 0 /* GPIO3_SEL - [3:0] */
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#define WM8904_GPIO3_SEL_WIDTH 4 /* GPIO3_SEL - [3:0] */
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/*
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* R124 (0x7C) - GPIO Control 4
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*/
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#define WM8904_GPI7_ENA 0x0200 /* GPI7_ENA */
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#define WM8904_GPI7_ENA_MASK 0x0200 /* GPI7_ENA */
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#define WM8904_GPI7_ENA_SHIFT 9 /* GPI7_ENA */
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#define WM8904_GPI7_ENA_WIDTH 1 /* GPI7_ENA */
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#define WM8904_GPI8_ENA 0x0100 /* GPI8_ENA */
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#define WM8904_GPI8_ENA_MASK 0x0100 /* GPI8_ENA */
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#define WM8904_GPI8_ENA_SHIFT 8 /* GPI8_ENA */
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#define WM8904_GPI8_ENA_WIDTH 1 /* GPI8_ENA */
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#define WM8904_GPIO_BCLK_MODE_ENA 0x0080 /* GPIO_BCLK_MODE_ENA */
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#define WM8904_GPIO_BCLK_MODE_ENA_MASK 0x0080 /* GPIO_BCLK_MODE_ENA */
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#define WM8904_GPIO_BCLK_MODE_ENA_SHIFT 7 /* GPIO_BCLK_MODE_ENA */
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#define WM8904_GPIO_BCLK_MODE_ENA_WIDTH 1 /* GPIO_BCLK_MODE_ENA */
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#define WM8904_GPIO_BCLK_SEL_MASK 0x000F /* GPIO_BCLK_SEL - [3:0] */
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#define WM8904_GPIO_BCLK_SEL_SHIFT 0 /* GPIO_BCLK_SEL - [3:0] */
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#define WM8904_GPIO_BCLK_SEL_WIDTH 4 /* GPIO_BCLK_SEL - [3:0] */
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#define WM8904_MIC_REGS 2
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#define WM8904_GPIO_REGS 4
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#define WM8904_DRC_REGS 4
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#define WM8904_EQ_REGS 24
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/**
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* DRC configurations are specified with a label and a set of register
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* values to write (the enable bits will be ignored). At runtime an
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* enumerated control will be presented for each DRC block allowing
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* the user to choose the configration to use.
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*
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* Configurations may be generated by hand or by using the DRC control
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* panel provided by the WISCE - see http://www.wolfsonmicro.com/wisce/
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* for details.
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*/
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struct wm8904_drc_cfg {
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const char *name;
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u16 regs[WM8904_DRC_REGS];
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};
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/**
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* ReTune Mobile configurations are specified with a label, sample
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* rate and set of values to write (the enable bits will be ignored).
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*
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* Configurations are expected to be generated using the ReTune Mobile
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* control panel in WISCE - see http://www.wolfsonmicro.com/wisce/
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*/
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struct wm8904_retune_mobile_cfg {
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const char *name;
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unsigned int rate;
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u16 regs[WM8904_EQ_REGS];
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};
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struct wm8904_pdata {
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int num_drc_cfgs;
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struct wm8904_drc_cfg *drc_cfgs;
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int num_retune_mobile_cfgs;
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struct wm8904_retune_mobile_cfg *retune_mobile_cfgs;
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u32 gpio_cfg[WM8904_GPIO_REGS];
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u32 mic_cfg[WM8904_MIC_REGS];
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};
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#endif
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