81 lines
1.7 KiB
C
81 lines
1.7 KiB
C
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* aQuantia Corporation Network Driver
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* Copyright (C) 2014-2017 aQuantia Corporation. All rights reserved
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*/
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/* File aq_hw_utils.c: Definitions of helper functions used across
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* hardware layer.
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*/
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#include "aq_hw_utils.h"
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#include "aq_hw.h"
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#include "aq_nic.h"
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void aq_hw_write_reg_bit(struct aq_hw_s *aq_hw, u32 addr, u32 msk,
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u32 shift, u32 val)
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{
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if (msk ^ ~0) {
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u32 reg_old, reg_new;
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reg_old = aq_hw_read_reg(aq_hw, addr);
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reg_new = (reg_old & (~msk)) | (val << shift);
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if (reg_old != reg_new)
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aq_hw_write_reg(aq_hw, addr, reg_new);
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} else {
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aq_hw_write_reg(aq_hw, addr, val);
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}
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}
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u32 aq_hw_read_reg_bit(struct aq_hw_s *aq_hw, u32 addr, u32 msk, u32 shift)
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{
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return ((aq_hw_read_reg(aq_hw, addr) & msk) >> shift);
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}
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u32 aq_hw_read_reg(struct aq_hw_s *hw, u32 reg)
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{
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u32 value = readl(hw->mmio + reg);
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if ((~0U) == value &&
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(~0U) == readl(hw->mmio +
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hw->aq_nic_cfg->aq_hw_caps->hw_alive_check_addr))
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aq_utils_obj_set(&hw->flags, AQ_HW_FLAG_ERR_UNPLUG);
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return value;
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}
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void aq_hw_write_reg(struct aq_hw_s *hw, u32 reg, u32 value)
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{
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writel(value, hw->mmio + reg);
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}
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/* Most of 64-bit registers are in LSW, MSW form.
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Counters are normally implemented by HW as latched pairs:
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reading LSW first locks MSW, to overcome LSW overflow
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*/
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u64 aq_hw_read_reg64(struct aq_hw_s *hw, u32 reg)
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{
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u64 value = aq_hw_read_reg(hw, reg);
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value |= (u64)aq_hw_read_reg(hw, reg + 4) << 32;
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return value;
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}
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int aq_hw_err_from_flags(struct aq_hw_s *hw)
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{
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int err = 0;
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if (aq_utils_obj_test(&hw->flags, AQ_HW_FLAG_ERR_UNPLUG)) {
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err = -ENXIO;
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goto err_exit;
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}
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if (aq_utils_obj_test(&hw->flags, AQ_HW_FLAG_ERR_HW)) {
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err = -EIO;
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goto err_exit;
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}
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err_exit:
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return err;
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}
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