137 lines
3.0 KiB
C
137 lines
3.0 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */
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/*
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* Copyright 2018-2019 Amazon.com, Inc. or its affiliates. All rights reserved.
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*/
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#ifndef _EFA_ADMIN_H_
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#define _EFA_ADMIN_H_
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enum efa_admin_aq_completion_status {
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EFA_ADMIN_SUCCESS = 0,
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EFA_ADMIN_RESOURCE_ALLOCATION_FAILURE = 1,
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EFA_ADMIN_BAD_OPCODE = 2,
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EFA_ADMIN_UNSUPPORTED_OPCODE = 3,
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EFA_ADMIN_MALFORMED_REQUEST = 4,
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/* Additional status is provided in ACQ entry extended_status */
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EFA_ADMIN_ILLEGAL_PARAMETER = 5,
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EFA_ADMIN_UNKNOWN_ERROR = 6,
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EFA_ADMIN_RESOURCE_BUSY = 7,
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};
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struct efa_admin_aq_common_desc {
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/*
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* 11:0 : command_id
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* 15:12 : reserved12
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*/
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u16 command_id;
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/* as appears in efa_admin_aq_opcode */
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u8 opcode;
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/*
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* 0 : phase
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* 1 : ctrl_data - control buffer address valid
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* 2 : ctrl_data_indirect - control buffer address
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* points to list of pages with addresses of control
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* buffers
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* 7:3 : reserved3
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*/
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u8 flags;
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};
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/*
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* used in efa_admin_aq_entry. Can point directly to control data, or to a
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* page list chunk. Used also at the end of indirect mode page list chunks,
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* for chaining.
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*/
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struct efa_admin_ctrl_buff_info {
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u32 length;
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struct efa_common_mem_addr address;
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};
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struct efa_admin_aq_entry {
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struct efa_admin_aq_common_desc aq_common_descriptor;
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union {
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u32 inline_data_w1[3];
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struct efa_admin_ctrl_buff_info control_buffer;
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} u;
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u32 inline_data_w4[12];
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};
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struct efa_admin_acq_common_desc {
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/*
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* command identifier to associate it with the aq descriptor
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* 11:0 : command_id
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* 15:12 : reserved12
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*/
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u16 command;
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u8 status;
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/*
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* 0 : phase
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* 7:1 : reserved1
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*/
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u8 flags;
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u16 extended_status;
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/*
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* indicates to the driver which AQ entry has been consumed by the
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* device and could be reused
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*/
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u16 sq_head_indx;
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};
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struct efa_admin_acq_entry {
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struct efa_admin_acq_common_desc acq_common_descriptor;
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u32 response_specific_data[14];
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};
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struct efa_admin_aenq_common_desc {
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u16 group;
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u16 syndrom;
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/*
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* 0 : phase
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* 7:1 : reserved - MBZ
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*/
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u8 flags;
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u8 reserved1[3];
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u32 timestamp_low;
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u32 timestamp_high;
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};
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struct efa_admin_aenq_entry {
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struct efa_admin_aenq_common_desc aenq_common_desc;
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/* command specific inline data */
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u32 inline_data_w4[12];
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};
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/* aq_common_desc */
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#define EFA_ADMIN_AQ_COMMON_DESC_COMMAND_ID_MASK GENMASK(11, 0)
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#define EFA_ADMIN_AQ_COMMON_DESC_PHASE_MASK BIT(0)
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#define EFA_ADMIN_AQ_COMMON_DESC_CTRL_DATA_SHIFT 1
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#define EFA_ADMIN_AQ_COMMON_DESC_CTRL_DATA_MASK BIT(1)
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#define EFA_ADMIN_AQ_COMMON_DESC_CTRL_DATA_INDIRECT_SHIFT 2
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#define EFA_ADMIN_AQ_COMMON_DESC_CTRL_DATA_INDIRECT_MASK BIT(2)
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/* acq_common_desc */
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#define EFA_ADMIN_ACQ_COMMON_DESC_COMMAND_ID_MASK GENMASK(11, 0)
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#define EFA_ADMIN_ACQ_COMMON_DESC_PHASE_MASK BIT(0)
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/* aenq_common_desc */
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#define EFA_ADMIN_AENQ_COMMON_DESC_PHASE_MASK BIT(0)
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#endif /* _EFA_ADMIN_H_ */
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