64 lines
1.6 KiB
C
64 lines
1.6 KiB
C
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2017 Chen-Yu Tsai. All rights reserved.
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*/
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#include <linux/clk-provider.h>
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#include <linux/clk/sunxi-ng.h>
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#include <linux/io.h>
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#include "ccu_common.h"
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/**
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* sunxi_ccu_set_mmc_timing_mode: Configure the MMC clock timing mode
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* @clk: clock to be configured
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* @new_mode: true for new timing mode introduced in A83T and later
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*
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* Returns 0 on success, -ENOTSUPP if the clock does not support
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* switching modes.
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*/
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int sunxi_ccu_set_mmc_timing_mode(struct clk *clk, bool new_mode)
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{
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struct clk_hw *hw = __clk_get_hw(clk);
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struct ccu_common *cm = hw_to_ccu_common(hw);
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unsigned long flags;
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u32 val;
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if (!(cm->features & CCU_FEATURE_MMC_TIMING_SWITCH))
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return -ENOTSUPP;
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spin_lock_irqsave(cm->lock, flags);
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val = readl(cm->base + cm->reg);
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if (new_mode)
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val |= CCU_MMC_NEW_TIMING_MODE;
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else
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val &= ~CCU_MMC_NEW_TIMING_MODE;
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writel(val, cm->base + cm->reg);
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spin_unlock_irqrestore(cm->lock, flags);
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return 0;
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}
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EXPORT_SYMBOL_GPL(sunxi_ccu_set_mmc_timing_mode);
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/**
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* sunxi_ccu_set_mmc_timing_mode: Get the current MMC clock timing mode
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* @clk: clock to query
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*
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* Returns 0 if the clock is in old timing mode, > 0 if it is in
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* new timing mode, and -ENOTSUPP if the clock does not support
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* this function.
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*/
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int sunxi_ccu_get_mmc_timing_mode(struct clk *clk)
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{
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struct clk_hw *hw = __clk_get_hw(clk);
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struct ccu_common *cm = hw_to_ccu_common(hw);
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if (!(cm->features & CCU_FEATURE_MMC_TIMING_SWITCH))
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return -ENOTSUPP;
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return !!(readl(cm->base + cm->reg) & CCU_MMC_NEW_TIMING_MODE);
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}
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EXPORT_SYMBOL_GPL(sunxi_ccu_get_mmc_timing_mode);
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