182 lines
6.2 KiB
C
182 lines
6.2 KiB
C
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* ELF register definitions..
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*/
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#ifndef _ASM_POWERPC_ELF_H
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#define _ASM_POWERPC_ELF_H
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#include <linux/sched.h> /* for task_struct */
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#include <asm/page.h>
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#include <asm/string.h>
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#include <uapi/asm/elf.h>
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/*
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* This is used to ensure we don't load something for the wrong architecture.
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*/
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#define elf_check_arch(x) ((x)->e_machine == ELF_ARCH)
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#define compat_elf_check_arch(x) ((x)->e_machine == EM_PPC)
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#define CORE_DUMP_USE_REGSET
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#define ELF_EXEC_PAGESIZE PAGE_SIZE
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/*
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* This is the base location for PIE (ET_DYN with INTERP) loads. On
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* 64-bit, this is raised to 4GB to leave the entire 32-bit address
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* space open for things that want to use the area for 32-bit pointers.
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*/
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#define ELF_ET_DYN_BASE (is_32bit_task() ? 0x000400000UL : \
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0x100000000UL)
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#define ELF_CORE_EFLAGS (is_elf2_task() ? 2 : 0)
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/*
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* Our registers are always unsigned longs, whether we're a 32 bit
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* process or 64 bit, on either a 64 bit or 32 bit kernel.
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*
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* This macro relies on elf_regs[i] having the right type to truncate to,
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* either u32 or u64. It defines the body of the elf_core_copy_regs
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* function, either the native one with elf_gregset_t elf_regs or
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* the 32-bit one with elf_gregset_t32 elf_regs.
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*/
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#define PPC_ELF_CORE_COPY_REGS(elf_regs, regs) \
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int i, nregs = min(sizeof(*regs) / sizeof(unsigned long), \
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(size_t)ELF_NGREG); \
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for (i = 0; i < nregs; i++) \
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elf_regs[i] = ((unsigned long *) regs)[i]; \
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memset(&elf_regs[i], 0, (ELF_NGREG - i) * sizeof(elf_regs[0]))
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/* Common routine for both 32-bit and 64-bit native processes */
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static inline void ppc_elf_core_copy_regs(elf_gregset_t elf_regs,
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struct pt_regs *regs)
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{
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PPC_ELF_CORE_COPY_REGS(elf_regs, regs);
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}
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#define ELF_CORE_COPY_REGS(gregs, regs) ppc_elf_core_copy_regs(gregs, regs);
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typedef elf_vrregset_t elf_fpxregset_t;
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/* ELF_HWCAP yields a mask that user programs can use to figure out what
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instruction set this cpu supports. This could be done in userspace,
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but it's not easy, and we've already done it here. */
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# define ELF_HWCAP (cur_cpu_spec->cpu_user_features)
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# define ELF_HWCAP2 (cur_cpu_spec->cpu_user_features2)
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/* This yields a string that ld.so will use to load implementation
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specific libraries for optimization. This is more specific in
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intent than poking at uname or /proc/cpuinfo. */
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#define ELF_PLATFORM (cur_cpu_spec->platform)
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/* While ELF_PLATFORM indicates the ISA supported by the platform, it
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* may not accurately reflect the underlying behavior of the hardware
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* (as in the case of running in Power5+ compatibility mode on a
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* Power6 machine). ELF_BASE_PLATFORM allows ld.so to load libraries
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* that are tuned for the real hardware.
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*/
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#define ELF_BASE_PLATFORM (powerpc_base_platform)
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#ifdef __powerpc64__
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# define ELF_PLAT_INIT(_r, load_addr) do { \
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_r->gpr[2] = load_addr; \
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} while (0)
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#endif /* __powerpc64__ */
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#ifdef __powerpc64__
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# define SET_PERSONALITY(ex) \
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do { \
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if (((ex).e_flags & 0x3) == 2) \
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set_thread_flag(TIF_ELF2ABI); \
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else \
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clear_thread_flag(TIF_ELF2ABI); \
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if ((ex).e_ident[EI_CLASS] == ELFCLASS32) \
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set_thread_flag(TIF_32BIT); \
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else \
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clear_thread_flag(TIF_32BIT); \
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if (personality(current->personality) != PER_LINUX32) \
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set_personality(PER_LINUX | \
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(current->personality & (~PER_MASK))); \
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} while (0)
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/*
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* An executable for which elf_read_implies_exec() returns TRUE will
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* have the READ_IMPLIES_EXEC personality flag set automatically. This
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* is only required to work around bugs in old 32bit toolchains. Since
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* the 64bit ABI has never had these issues dont enable the workaround
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* even if we have an executable stack.
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*/
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# define elf_read_implies_exec(ex, exec_stk) (is_32bit_task() ? \
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(exec_stk == EXSTACK_DEFAULT) : 0)
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#else
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# define elf_read_implies_exec(ex, exec_stk) (exec_stk == EXSTACK_DEFAULT)
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#endif /* __powerpc64__ */
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extern int dcache_bsize;
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extern int icache_bsize;
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extern int ucache_bsize;
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/* vDSO has arch_setup_additional_pages */
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#define ARCH_HAS_SETUP_ADDITIONAL_PAGES
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struct linux_binprm;
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extern int arch_setup_additional_pages(struct linux_binprm *bprm,
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int uses_interp);
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#define VDSO_AUX_ENT(a,b) NEW_AUX_ENT(a,b)
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/* 1GB for 64bit, 8MB for 32bit */
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#define STACK_RND_MASK (is_32bit_task() ? \
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(0x7ff >> (PAGE_SHIFT - 12)) : \
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(0x3ffff >> (PAGE_SHIFT - 12)))
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#ifdef CONFIG_SPU_BASE
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/* Notes used in ET_CORE. Note name is "SPU/<fd>/<filename>". */
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#define NT_SPU 1
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#define ARCH_HAVE_EXTRA_ELF_NOTES
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#endif /* CONFIG_SPU_BASE */
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#ifdef CONFIG_PPC64
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#define get_cache_geometry(level) \
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(ppc64_caches.level.assoc << 16 | ppc64_caches.level.line_size)
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#define ARCH_DLINFO_CACHE_GEOMETRY \
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NEW_AUX_ENT(AT_L1I_CACHESIZE, ppc64_caches.l1i.size); \
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NEW_AUX_ENT(AT_L1I_CACHEGEOMETRY, get_cache_geometry(l1i)); \
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NEW_AUX_ENT(AT_L1D_CACHESIZE, ppc64_caches.l1d.size); \
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NEW_AUX_ENT(AT_L1D_CACHEGEOMETRY, get_cache_geometry(l1d)); \
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NEW_AUX_ENT(AT_L2_CACHESIZE, ppc64_caches.l2.size); \
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NEW_AUX_ENT(AT_L2_CACHEGEOMETRY, get_cache_geometry(l2)); \
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NEW_AUX_ENT(AT_L3_CACHESIZE, ppc64_caches.l3.size); \
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NEW_AUX_ENT(AT_L3_CACHEGEOMETRY, get_cache_geometry(l3))
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#else
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#define ARCH_DLINFO_CACHE_GEOMETRY
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#endif
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/*
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* The requirements here are:
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* - keep the final alignment of sp (sp & 0xf)
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* - make sure the 32-bit value at the first 16 byte aligned position of
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* AUXV is greater than 16 for glibc compatibility.
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* AT_IGNOREPPC is used for that.
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* - for compatibility with glibc ARCH_DLINFO must always be defined on PPC,
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* even if DLINFO_ARCH_ITEMS goes to zero or is undefined.
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* update AT_VECTOR_SIZE_ARCH if the number of NEW_AUX_ENT entries changes
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*/
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#define ARCH_DLINFO \
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do { \
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/* Handle glibc compatibility. */ \
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NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC); \
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NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC); \
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/* Cache size items */ \
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NEW_AUX_ENT(AT_DCACHEBSIZE, dcache_bsize); \
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NEW_AUX_ENT(AT_ICACHEBSIZE, icache_bsize); \
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NEW_AUX_ENT(AT_UCACHEBSIZE, ucache_bsize); \
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VDSO_AUX_ENT(AT_SYSINFO_EHDR, current->mm->context.vdso_base); \
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ARCH_DLINFO_CACHE_GEOMETRY; \
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} while (0)
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/* Relocate the kernel image to @final_address */
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void relocate(unsigned long final_address);
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#endif /* _ASM_POWERPC_ELF_H */
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