86 lines
1.9 KiB
Plaintext
86 lines
1.9 KiB
Plaintext
|
// SPDX-License-Identifier: GPL-2.0-or-later
|
||
|
|
/*
|
||
|
|
* P2020 DS Device Tree Source
|
||
|
|
*
|
||
|
|
* Copyright 2009-2011 Freescale Semiconductor Inc.
|
||
|
|
*/
|
||
|
|
|
||
|
|
/include/ "p2020si-pre.dtsi"
|
||
|
|
|
||
|
|
/ {
|
||
|
|
model = "fsl,P2020DS";
|
||
|
|
compatible = "fsl,P2020DS";
|
||
|
|
|
||
|
|
memory {
|
||
|
|
device_type = "memory";
|
||
|
|
};
|
||
|
|
|
||
|
|
board_lbc: lbc: localbus@ffe05000 {
|
||
|
|
ranges = <0x0 0x0 0x0 0xe8000000 0x08000000
|
||
|
|
0x1 0x0 0x0 0xe0000000 0x08000000
|
||
|
|
0x2 0x0 0x0 0xffa00000 0x00040000
|
||
|
|
0x3 0x0 0x0 0xffdf0000 0x00008000
|
||
|
|
0x4 0x0 0x0 0xffa40000 0x00040000
|
||
|
|
0x5 0x0 0x0 0xffa80000 0x00040000
|
||
|
|
0x6 0x0 0x0 0xffac0000 0x00040000>;
|
||
|
|
reg = <0 0xffe05000 0 0x1000>;
|
||
|
|
};
|
||
|
|
|
||
|
|
board_soc: soc: soc@ffe00000 {
|
||
|
|
ranges = <0x0 0x0 0xffe00000 0x100000>;
|
||
|
|
};
|
||
|
|
|
||
|
|
pci2: pcie@ffe08000 {
|
||
|
|
ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
|
||
|
|
0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
|
||
|
|
reg = <0 0xffe08000 0 0x1000>;
|
||
|
|
pcie@0 {
|
||
|
|
ranges = <0x2000000 0x0 0x80000000
|
||
|
|
0x2000000 0x0 0x80000000
|
||
|
|
0x0 0x20000000
|
||
|
|
|
||
|
|
0x1000000 0x0 0x0
|
||
|
|
0x1000000 0x0 0x0
|
||
|
|
0x0 0x10000>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
board_pci1: pci1: pcie@ffe09000 {
|
||
|
|
ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
|
||
|
|
0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
|
||
|
|
reg = <0 0xffe09000 0 0x1000>;
|
||
|
|
pcie@0 {
|
||
|
|
ranges = <0x2000000 0x0 0xa0000000
|
||
|
|
0x2000000 0x0 0xa0000000
|
||
|
|
0x0 0x20000000
|
||
|
|
|
||
|
|
0x1000000 0x0 0x0
|
||
|
|
0x1000000 0x0 0x0
|
||
|
|
0x0 0x10000>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
pci0: pcie@ffe0a000 {
|
||
|
|
ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000
|
||
|
|
0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>;
|
||
|
|
reg = <0 0xffe0a000 0 0x1000>;
|
||
|
|
pcie@0 {
|
||
|
|
ranges = <0x2000000 0x0 0xc0000000
|
||
|
|
0x2000000 0x0 0xc0000000
|
||
|
|
0x0 0x20000000
|
||
|
|
|
||
|
|
0x1000000 0x0 0x0
|
||
|
|
0x1000000 0x0 0x0
|
||
|
|
0x0 0x10000>;
|
||
|
|
};
|
||
|
|
};
|
||
|
|
};
|
||
|
|
|
||
|
|
/*
|
||
|
|
* p2020ds.dtsi must be last to ensure board_pci0 overrides pci0 settings
|
||
|
|
* for interrupt-map & interrupt-map-mask
|
||
|
|
*/
|
||
|
|
|
||
|
|
/include/ "p2020si-post.dtsi"
|
||
|
|
/include/ "p2020ds.dtsi"
|