133 lines
4.0 KiB
C
133 lines
4.0 KiB
C
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/*
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* Copyright 2003-2011 NetLogic Microsystems, Inc. (NetLogic). All rights
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* reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the NetLogic
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* license below:
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY NETLOGIC ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
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* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
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* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
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* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _NETLOGIC_COMMON_H_
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#define _NETLOGIC_COMMON_H_
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/*
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* Common SMP definitions
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*/
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#define RESET_VEC_PHYS 0x1fc00000
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#define RESET_VEC_SIZE 8192 /* 8KB reset code and data */
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#define RESET_DATA_PHYS (RESET_VEC_PHYS + (1<<10))
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/* Offsets of parameters in the RESET_DATA_PHYS area */
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#define BOOT_THREAD_MODE 0
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#define BOOT_NMI_LOCK 4
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#define BOOT_NMI_HANDLER 8
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/* CPU ready flags for each CPU */
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#define BOOT_CPU_READY 2048
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#ifndef __ASSEMBLY__
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#include <linux/cpumask.h>
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#include <linux/spinlock.h>
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#include <asm/irq.h>
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#include <asm/mach-netlogic/multi-node.h>
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struct irq_desc;
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void nlm_smp_function_ipi_handler(struct irq_desc *desc);
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void nlm_smp_resched_ipi_handler(struct irq_desc *desc);
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void nlm_smp_irq_init(int hwcpuid);
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void nlm_boot_secondary_cpus(void);
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int nlm_wakeup_secondary_cpus(void);
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void nlm_rmiboot_preboot(void);
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void nlm_percpu_init(int hwcpuid);
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static inline void *
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nlm_get_boot_data(int offset)
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{
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return (void *)(CKSEG1ADDR(RESET_DATA_PHYS) + offset);
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}
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static inline void
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nlm_set_nmi_handler(void *handler)
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{
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void *nmih = nlm_get_boot_data(BOOT_NMI_HANDLER);
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*(int64_t *)nmih = (long)handler;
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}
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/*
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* Misc.
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*/
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void nlm_init_boot_cpu(void);
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unsigned int nlm_get_cpu_frequency(void);
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extern const struct plat_smp_ops nlm_smp_ops;
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extern char nlm_reset_entry[], nlm_reset_entry_end[];
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extern unsigned int nlm_threads_per_core;
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extern cpumask_t nlm_cpumask;
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struct irq_data;
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uint64_t nlm_pci_irqmask(int node);
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void nlm_setup_pic_irq(int node, int picirq, int irq, int irt);
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void nlm_set_pic_extra_ack(int node, int irq, void (*xack)(struct irq_data *));
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#ifdef CONFIG_PCI_MSI
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void nlm_dispatch_msi(int node, int lirq);
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void nlm_dispatch_msix(int node, int msixirq);
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#endif
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/*
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* The NR_IRQs is divided between nodes, each of them has a separate irq space
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*/
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static inline int nlm_irq_to_xirq(int node, int irq)
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{
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return node * NR_IRQS / NLM_NR_NODES + irq;
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}
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#ifdef CONFIG_CPU_XLR
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#define nlm_cores_per_node() 8
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#else
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static inline int nlm_cores_per_node(void)
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{
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return ((read_c0_prid() & PRID_IMP_MASK)
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== PRID_IMP_NETLOGIC_XLP9XX) ? 32 : 8;
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}
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#endif
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static inline int nlm_threads_per_node(void)
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{
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return nlm_cores_per_node() * NLM_THREADS_PER_CORE;
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}
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static inline int nlm_hwtid_to_node(int hwtid)
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{
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return hwtid / nlm_threads_per_node();
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}
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extern int nlm_cpu_ready[];
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#endif /* __ASSEMBLY__ */
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#endif /* _NETLOGIC_COMMON_H_ */
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