260 lines
4.9 KiB
Plaintext
260 lines
4.9 KiB
Plaintext
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// SPDX-License-Identifier: GPL-2.0
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/dts-v1/;
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/memreserve/ 0x00000000 0x00001000; // reserved
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/memreserve/ 0x00001000 0x000ef000; // ROM data
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/memreserve/ 0x000f0000 0x004cc000; // reserved
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#include <dt-bindings/interrupt-controller/mips-gic.h>
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "mti,sead-3";
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model = "MIPS SEAD-3";
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chosen {
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stdout-path = "serial1:115200";
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};
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aliases {
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serial0 = &uart0;
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serial1 = &uart1;
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};
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cpus {
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cpu@0 {
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compatible = "mti,mips14KEc", "mti,mips14Kc";
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};
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};
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memory {
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device_type = "memory";
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reg = <0x0 0x08000000>;
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};
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cpu_intc: interrupt-controller {
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compatible = "mti,cpu-interrupt-controller";
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interrupt-controller;
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#interrupt-cells = <1>;
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};
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gic: interrupt-controller@1b1c0000 {
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compatible = "mti,gic";
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reg = <0x1b1c0000 0x20000>;
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interrupt-controller;
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#interrupt-cells = <3>;
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/*
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* Declare the interrupt-parent even though the mti,gic
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* binding doesn't require it, such that the kernel can
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* figure out that cpu_intc is the root interrupt
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* controller & should be probed first.
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*/
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interrupt-parent = <&cpu_intc>;
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};
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ehci@1b200000 {
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compatible = "generic-ehci";
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reg = <0x1b200000 0x1000>;
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interrupt-parent = <&gic>;
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interrupts = <GIC_SHARED 0 IRQ_TYPE_LEVEL_HIGH>; /* GIC 0 or CPU 6 */
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has-transaction-translator;
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};
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flash@1c000000 {
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compatible = "intel,28f128j3", "cfi-flash";
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reg = <0x1c000000 0x2000000>;
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#address-cells = <1>;
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#size-cells = <1>;
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bank-width = <4>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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user-fs@0 {
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label = "User FS";
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reg = <0x0 0x1fc0000>;
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};
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board-config@3e0000 {
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label = "Board Config";
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reg = <0x1fc0000 0x40000>;
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};
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};
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};
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fpga_regs: system-controller@1f000000 {
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compatible = "mti,sead3-fpga", "syscon", "simple-mfd";
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reg = <0x1f000000 0x200>;
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reboot {
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compatible = "syscon-reboot";
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regmap = <&fpga_regs>;
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offset = <0x50>;
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mask = <0x4d>;
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};
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poweroff {
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compatible = "restart-poweroff";
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};
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};
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system-controller@1f000200 {
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compatible = "mti,sead3-cpld", "syscon", "simple-mfd";
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reg = <0x1f000200 0x300>;
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led@10.0 {
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compatible = "register-bit-led";
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offset = <0x10>;
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mask = <0x1>;
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label = "pled0";
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};
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led@10.1 {
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compatible = "register-bit-led";
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offset = <0x10>;
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mask = <0x2>;
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label = "pled1";
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};
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led@10.2 {
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compatible = "register-bit-led";
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offset = <0x10>;
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mask = <0x4>;
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label = "pled2";
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};
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led@10.3 {
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compatible = "register-bit-led";
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offset = <0x10>;
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mask = <0x8>;
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label = "pled3";
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};
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led@10.4 {
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compatible = "register-bit-led";
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offset = <0x10>;
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mask = <0x10>;
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label = "pled4";
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};
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led@10.5 {
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compatible = "register-bit-led";
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offset = <0x10>;
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mask = <0x20>;
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label = "pled5";
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};
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led@10.6 {
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compatible = "register-bit-led";
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offset = <0x10>;
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mask = <0x40>;
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label = "pled6";
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};
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led@10.7 {
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compatible = "register-bit-led";
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offset = <0x10>;
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mask = <0x80>;
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label = "pled7";
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};
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led@18.0 {
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compatible = "register-bit-led";
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offset = <0x18>;
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mask = <0x1>;
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label = "fled0";
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};
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led@18.1 {
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compatible = "register-bit-led";
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offset = <0x18>;
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mask = <0x2>;
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label = "fled1";
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};
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led@18.2 {
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compatible = "register-bit-led";
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offset = <0x18>;
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mask = <0x4>;
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label = "fled2";
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};
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led@18.3 {
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compatible = "register-bit-led";
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offset = <0x18>;
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mask = <0x8>;
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label = "fled3";
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};
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led@18.4 {
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compatible = "register-bit-led";
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offset = <0x18>;
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mask = <0x10>;
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label = "fled4";
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};
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led@18.5 {
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compatible = "register-bit-led";
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offset = <0x18>;
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mask = <0x20>;
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label = "fled5";
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};
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led@18.6 {
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compatible = "register-bit-led";
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offset = <0x18>;
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mask = <0x40>;
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label = "fled6";
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};
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led@18.7 {
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compatible = "register-bit-led";
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offset = <0x18>;
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mask = <0x80>;
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label = "fled7";
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};
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lcd@200 {
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compatible = "mti,sead3-lcd";
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offset = <0x200>;
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};
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};
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/* UART connected to FTDI & miniUSB socket */
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uart0: uart@1f000900 {
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compatible = "ns16550a";
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reg = <0x1f000900 0x20>;
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reg-io-width = <4>;
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reg-shift = <2>;
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clock-frequency = <14745600>;
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interrupt-parent = <&gic>;
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interrupts = <GIC_SHARED 3 IRQ_TYPE_LEVEL_HIGH>; /* GIC 3 or CPU 4 */
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no-loopback-test;
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};
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/* UART connected to RS232 socket */
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uart1: uart@1f000800 {
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compatible = "ns16550a";
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reg = <0x1f000800 0x20>;
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reg-io-width = <4>;
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reg-shift = <2>;
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clock-frequency = <14745600>;
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interrupt-parent = <&gic>;
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interrupts = <GIC_SHARED 2 IRQ_TYPE_LEVEL_HIGH>; /* GIC 2 or CPU 4 */
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no-loopback-test;
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};
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eth@1f010000 {
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compatible = "smsc,lan9115";
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reg = <0x1f010000 0x10000>;
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reg-io-width = <4>;
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interrupt-parent = <&gic>;
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interrupts = <GIC_SHARED 0 IRQ_TYPE_LEVEL_HIGH>; /* GIC 0 or CPU 6 */
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phy-mode = "mii";
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smsc,irq-push-pull;
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smsc,save-mac-address;
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};
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};
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