52 lines
1.6 KiB
Plaintext
52 lines
1.6 KiB
Plaintext
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TI SOC ECAP based APWM controller
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Required properties:
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- compatible: Must be "ti,<soc>-ecap".
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for am33xx - compatible = "ti,am3352-ecap", "ti,am33xx-ecap";
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for am4372 - compatible = "ti,am4372-ecap", "ti,am3352-ecap", "ti,am33xx-ecap";
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for da850 - compatible = "ti,da850-ecap", "ti,am3352-ecap", "ti,am33xx-ecap";
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for dra746 - compatible = "ti,dra746-ecap", "ti,am3352-ecap";
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for 66ak2g - compatible = "ti,k2g-ecap", "ti,am3352-ecap";
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for am654 - compatible = "ti,am654-ecap", "ti,am3352-ecap";
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- #pwm-cells: should be 3. See pwm.txt in this directory for a description of
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the cells format. The PWM channel index ranges from 0 to 4. The only third
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cell flag supported by this binding is PWM_POLARITY_INVERTED.
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- reg: physical base address and size of the registers map.
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Optional properties:
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- clocks: Handle to the ECAP's functional clock.
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- clock-names: Must be set to "fck".
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Example:
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ecap0: ecap@48300100 { /* ECAP on am33xx */
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compatible = "ti,am3352-ecap", "ti,am33xx-ecap";
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#pwm-cells = <3>;
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reg = <0x48300100 0x80>;
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clocks = <&l4ls_gclk>;
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clock-names = "fck";
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};
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ecap0: ecap@48300100 { /* ECAP on am4372 */
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compatible = "ti,am4372-ecap", "ti,am3352-ecap", "ti,am33xx-ecap";
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#pwm-cells = <3>;
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reg = <0x48300100 0x80>;
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ti,hwmods = "ecap0";
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clocks = <&l4ls_gclk>;
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clock-names = "fck";
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};
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ecap0: ecap@1f06000 { /* ECAP on da850 */
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compatible = "ti,da850-ecap", "ti,am3352-ecap", "ti,am33xx-ecap";
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#pwm-cells = <3>;
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reg = <0x1f06000 0x80>;
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};
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ecap0: ecap@4843e100 {
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compatible = "ti,dra746-ecap", "ti,am3352-ecap";
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#pwm-cells = <3>;
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reg = <0x4843e100 0x80>;
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clocks = <&l4_root_clk_div>;
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clock-names = "fck";
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};
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