77 lines
2.6 KiB
Plaintext
77 lines
2.6 KiB
Plaintext
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Tegra SoC PWFM controller
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Required properties:
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- compatible: Must be:
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- "nvidia,tegra20-pwm": for Tegra20
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- "nvidia,tegra30-pwm", "nvidia,tegra20-pwm": for Tegra30
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- "nvidia,tegra114-pwm", "nvidia,tegra20-pwm": for Tegra114
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- "nvidia,tegra124-pwm", "nvidia,tegra20-pwm": for Tegra124
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- "nvidia,tegra132-pwm", "nvidia,tegra20-pwm": for Tegra132
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- "nvidia,tegra210-pwm", "nvidia,tegra20-pwm": for Tegra210
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- "nvidia,tegra186-pwm": for Tegra186
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- reg: physical base address and length of the controller's registers
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- #pwm-cells: should be 2. See pwm.txt in this directory for a description of
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the cells format.
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- clocks: Must contain one entry, for the module clock.
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See ../clocks/clock-bindings.txt for details.
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- resets: Must contain an entry for each entry in reset-names.
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See ../reset/reset.txt for details.
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- reset-names: Must include the following entries:
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- pwm
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Optional properties:
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============================
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In some of the interface like PWM based regulator device, it is required
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to configure the pins differently in different states, especially in suspend
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state of the system. The configuration of pin is provided via the pinctrl
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DT node as detailed in the pinctrl DT binding document
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Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
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The PWM node will have following optional properties.
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pinctrl-names: Pin state names. Must be "default" and "sleep".
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pinctrl-0: phandle for the default/active state of pin configurations.
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pinctrl-1: phandle for the sleep state of pin configurations.
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Example:
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pwm: pwm@7000a000 {
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compatible = "nvidia,tegra20-pwm";
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reg = <0x7000a000 0x100>;
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#pwm-cells = <2>;
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clocks = <&tegra_car 17>;
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resets = <&tegra_car 17>;
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reset-names = "pwm";
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};
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Example with the pin configuration for suspend and resume:
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=========================================================
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Suppose pin PE7 (On Tegra210) interfaced with the regulator device and
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it requires PWM output to be tristated when system enters suspend.
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Following will be DT binding to achieve this:
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#include <dt-bindings/pinctrl/pinctrl-tegra.h>
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pinmux@700008d4 {
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pwm_active_state: pwm_active_state {
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pe7 {
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nvidia,pins = "pe7";
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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};
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};
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pwm_sleep_state: pwm_sleep_state {
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pe7 {
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nvidia,pins = "pe7";
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nvidia,tristate = <TEGRA_PIN_ENABLE>;
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};
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};
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};
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pwm@7000a000 {
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/* Mandatory PWM properties */
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&pwm_active_state>;
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pinctrl-1 = <&pwm_sleep_state>;
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};
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