82 lines
1.8 KiB
Plaintext
82 lines
1.8 KiB
Plaintext
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STM32 DMA MUX (DMA request router)
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Required properties:
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- compatible: "st,stm32h7-dmamux"
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- reg: Memory map for accessing module
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- #dma-cells: Should be set to <3>.
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For more details about the three cells, please see
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stm32-dma.txt documentation binding file
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- dma-masters: Phandle pointing to the DMA controllers.
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Several controllers are allowed. Only "st,stm32-dma" DMA
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compatible are supported.
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Optional properties:
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- dma-channels : Number of DMA requests supported.
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- dma-requests : Number of DMAMUX requests supported.
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- resets: Reference to a reset controller asserting the DMA controller
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- clocks: Input clock of the DMAMUX instance.
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Example:
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/* DMA controller 1 */
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dma1: dma-controller@40020000 {
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compatible = "st,stm32-dma";
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reg = <0x40020000 0x400>;
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interrupts = <11>,
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<12>,
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<13>,
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<14>,
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<15>,
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<16>,
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<17>,
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<47>;
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clocks = <&timer_clk>;
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#dma-cells = <4>;
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st,mem2mem;
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resets = <&rcc 150>;
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dma-channels = <8>;
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dma-requests = <8>;
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};
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/* DMA controller 1 */
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dma2: dma@40020400 {
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compatible = "st,stm32-dma";
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reg = <0x40020400 0x400>;
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interrupts = <56>,
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<57>,
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<58>,
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<59>,
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<60>,
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<68>,
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<69>,
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<70>;
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clocks = <&clk_hclk>;
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#dma-cells = <4>;
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st,mem2mem;
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resets = <&rcc 150>;
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dma-channels = <8>;
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dma-requests = <8>;
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};
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/* DMA mux */
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dmamux1: dma-router@40020800 {
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compatible = "st,stm32h7-dmamux";
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reg = <0x40020800 0x3c>;
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#dma-cells = <3>;
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dma-requests = <128>;
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dma-channels = <16>;
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dma-masters = <&dma1 &dma2>;
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clocks = <&timer_clk>;
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};
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/* DMA client */
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usart1: serial@40011000 {
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compatible = "st,stm32-usart", "st,stm32-uart";
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reg = <0x40011000 0x400>;
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interrupts = <37>;
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clocks = <&timer_clk>;
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dmas = <&dmamux1 41 0x414 0>,
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<&dmamux1 42 0x414 0>;
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dma-names = "rx", "tx";
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};
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