45 lines
1.5 KiB
Plaintext
45 lines
1.5 KiB
Plaintext
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Tegra SoC SATA AHCI controller
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Required properties :
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- compatible : Must be one of:
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- Tegra124 : "nvidia,tegra124-ahci"
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- Tegra132 : "nvidia,tegra132-ahci", "nvidia,tegra124-ahci"
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- Tegra210 : "nvidia,tegra210-ahci"
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- reg : Should contain 2 entries:
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- AHCI register set (SATA BAR5)
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- SATA register set
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- interrupts : Defines the interrupt used by SATA
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- clocks : Must contain an entry for each entry in clock-names.
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See ../clocks/clock-bindings.txt for details.
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- clock-names : Must include the following entries:
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- sata
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- sata-oob
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- resets : Must contain an entry for each entry in reset-names.
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See ../reset/reset.txt for details.
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- reset-names : Must include the following entries:
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- sata
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- sata-oob
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- sata-cold
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- phys : Must contain an entry for each entry in phy-names.
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See ../phy/phy-bindings.txt for details.
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- phy-names : Must include the following entries:
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- For Tegra124 and Tegra132:
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- sata-phy : XUSB PADCTL SATA PHY
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- For Tegra124 and Tegra132:
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- hvdd-supply : Defines the SATA HVDD regulator
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- vddio-supply : Defines the SATA VDDIO regulator
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- avdd-supply : Defines the SATA AVDD regulator
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- target-5v-supply : Defines the SATA 5V power regulator
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- target-12v-supply : Defines the SATA 12V power regulator
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Optional properties:
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- reg :
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- AUX register set
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- clock-names :
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- cml1 :
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cml1 clock should be defined here if the PHY driver
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doesn't manage them. If it does, they should not be.
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- phy-names :
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- For T210:
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- sata-phy
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