56 lines
2.0 KiB
Plaintext
56 lines
2.0 KiB
Plaintext
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* Cortina Systems Gemini SATA Bridge
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The Gemini SATA bridge in a SoC-internal PATA to SATA bridge that
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takes two Faraday Technology FTIDE010 PATA controllers and bridges
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them in different configurations to two SATA ports.
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Required properties:
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- compatible: should be
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"cortina,gemini-sata-bridge"
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- reg: registers and size for the block
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- resets: phandles to the reset lines for both SATA bridges
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- reset-names: must be "sata0", "sata1"
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- clocks: phandles to the compulsory peripheral clocks
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- clock-names: must be "SATA0_PCLK", "SATA1_PCLK"
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- syscon: a phandle to the global Gemini system controller
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- cortina,gemini-ata-muxmode: tell the desired multiplexing mode for
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the ATA controller and SATA bridges. Values 0..3:
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Mode 0: ata0 master <-> sata0
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ata1 master <-> sata1
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ata0 slave interface brought out on IDE pads
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Mode 1: ata0 master <-> sata0
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ata1 master <-> sata1
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ata1 slave interface brought out on IDE pads
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Mode 2: ata1 master <-> sata1
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ata1 slave <-> sata0
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ata0 master and slave interfaces brought out
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on IDE pads
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Mode 3: ata0 master <-> sata0
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ata0 slave <-> sata1
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ata1 master and slave interfaces brought out
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on IDE pads
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Optional boolean properties:
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- cortina,gemini-enable-ide-pins: enables the PATA to IDE connection.
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The muxmode setting decides whether ATA0 or ATA1 is brought out,
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and whether master, slave or both interfaces get brought out.
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- cortina,gemini-enable-sata-bridge: enables the PATA to SATA bridge
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inside the Gemnini SoC. The Muxmode decides what PATA blocks will
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be muxed out and how.
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Example:
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sata: sata@46000000 {
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compatible = "cortina,gemini-sata-bridge";
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reg = <0x46000000 0x100>;
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resets = <&rcon 26>, <&rcon 27>;
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reset-names = "sata0", "sata1";
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clocks = <&gcc GEMINI_CLK_GATE_SATA0>,
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<&gcc GEMINI_CLK_GATE_SATA1>;
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clock-names = "SATA0_PCLK", "SATA1_PCLK";
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syscon = <&syscon>;
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cortina,gemini-ata-muxmode = <3>;
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cortina,gemini-enable-ide-pins;
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cortina,gemini-enable-sata-bridge;
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};
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