170 lines
4.0 KiB
C
170 lines
4.0 KiB
C
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* irq.c: API for in kernel interrupt controller
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* Copyright (c) 2007, Intel Corporation.
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* Copyright 2009 Red Hat, Inc. and/or its affiliates.
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*
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* Authors:
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* Yaozu (Eddie) Dong <Eddie.dong@intel.com>
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*/
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#include <linux/export.h>
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#include <linux/kvm_host.h>
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#include "irq.h"
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#include "i8254.h"
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#include "x86.h"
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/*
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* check if there are pending timer events
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* to be processed.
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*/
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int kvm_cpu_has_pending_timer(struct kvm_vcpu *vcpu)
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{
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if (lapic_in_kernel(vcpu))
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return apic_has_pending_timer(vcpu);
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return 0;
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}
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EXPORT_SYMBOL(kvm_cpu_has_pending_timer);
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/*
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* check if there is a pending userspace external interrupt
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*/
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static int pending_userspace_extint(struct kvm_vcpu *v)
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{
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return v->arch.pending_external_vector != -1;
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}
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/*
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* check if there is pending interrupt from
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* non-APIC source without intack.
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*/
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static int kvm_cpu_has_extint(struct kvm_vcpu *v)
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{
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u8 accept = kvm_apic_accept_pic_intr(v);
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if (accept) {
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if (irqchip_split(v->kvm))
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return pending_userspace_extint(v);
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else
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return v->kvm->arch.vpic->output;
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} else
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return 0;
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}
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/*
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* check if there is injectable interrupt:
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* when virtual interrupt delivery enabled,
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* interrupt from apic will handled by hardware,
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* we don't need to check it here.
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*/
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int kvm_cpu_has_injectable_intr(struct kvm_vcpu *v)
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{
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/*
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* FIXME: interrupt.injected represents an interrupt that it's
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* side-effects have already been applied (e.g. bit from IRR
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* already moved to ISR). Therefore, it is incorrect to rely
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* on interrupt.injected to know if there is a pending
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* interrupt in the user-mode LAPIC.
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* This leads to nVMX/nSVM not be able to distinguish
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* if it should exit from L2 to L1 on EXTERNAL_INTERRUPT on
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* pending interrupt or should re-inject an injected
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* interrupt.
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*/
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if (!lapic_in_kernel(v))
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return v->arch.interrupt.injected;
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if (kvm_cpu_has_extint(v))
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return 1;
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if (!is_guest_mode(v) && kvm_vcpu_apicv_active(v))
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return 0;
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return kvm_apic_has_interrupt(v) != -1; /* LAPIC */
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}
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/*
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* check if there is pending interrupt without
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* intack.
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*/
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int kvm_cpu_has_interrupt(struct kvm_vcpu *v)
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{
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/*
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* FIXME: interrupt.injected represents an interrupt that it's
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* side-effects have already been applied (e.g. bit from IRR
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* already moved to ISR). Therefore, it is incorrect to rely
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* on interrupt.injected to know if there is a pending
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* interrupt in the user-mode LAPIC.
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* This leads to nVMX/nSVM not be able to distinguish
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* if it should exit from L2 to L1 on EXTERNAL_INTERRUPT on
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* pending interrupt or should re-inject an injected
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* interrupt.
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*/
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if (!lapic_in_kernel(v))
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return v->arch.interrupt.injected;
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if (kvm_cpu_has_extint(v))
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return 1;
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return kvm_apic_has_interrupt(v) != -1; /* LAPIC */
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}
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EXPORT_SYMBOL_GPL(kvm_cpu_has_interrupt);
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/*
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* Read pending interrupt(from non-APIC source)
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* vector and intack.
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*/
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static int kvm_cpu_get_extint(struct kvm_vcpu *v)
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{
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if (kvm_cpu_has_extint(v)) {
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if (irqchip_split(v->kvm)) {
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int vector = v->arch.pending_external_vector;
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v->arch.pending_external_vector = -1;
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return vector;
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} else
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return kvm_pic_read_irq(v->kvm); /* PIC */
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} else
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return -1;
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}
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/*
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* Read pending interrupt vector and intack.
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*/
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int kvm_cpu_get_interrupt(struct kvm_vcpu *v)
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{
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int vector;
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if (!lapic_in_kernel(v))
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return v->arch.interrupt.nr;
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vector = kvm_cpu_get_extint(v);
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if (vector != -1)
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return vector; /* PIC */
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return kvm_get_apic_interrupt(v); /* APIC */
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}
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EXPORT_SYMBOL_GPL(kvm_cpu_get_interrupt);
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void kvm_inject_pending_timer_irqs(struct kvm_vcpu *vcpu)
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{
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if (lapic_in_kernel(vcpu))
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kvm_inject_apic_timer_irqs(vcpu);
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}
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EXPORT_SYMBOL_GPL(kvm_inject_pending_timer_irqs);
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void __kvm_migrate_timers(struct kvm_vcpu *vcpu)
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{
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__kvm_migrate_apic_timer(vcpu);
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__kvm_migrate_pit_timer(vcpu);
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}
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bool kvm_arch_irqfd_allowed(struct kvm *kvm, struct kvm_irqfd *args)
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{
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bool resample = args->flags & KVM_IRQFD_FLAG_RESAMPLE;
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return resample ? irqchip_kernel(kvm) : irqchip_in_kernel(kvm);
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}
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