133 lines
3.1 KiB
ArmAsm
133 lines
3.1 KiB
ArmAsm
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* tsunami.S: High speed MicroSparc-I mmu/cache operations.
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*
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* Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
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*/
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#include <asm/ptrace.h>
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#include <asm/asm-offsets.h>
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#include <asm/psr.h>
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#include <asm/asi.h>
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#include <asm/page.h>
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#include <asm/pgtsrmmu.h>
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.text
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.align 4
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.globl tsunami_flush_cache_all, tsunami_flush_cache_mm
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.globl tsunami_flush_cache_range, tsunami_flush_cache_page
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.globl tsunami_flush_page_to_ram, tsunami_flush_page_for_dma
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.globl tsunami_flush_sig_insns
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.globl tsunami_flush_tlb_all, tsunami_flush_tlb_mm
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.globl tsunami_flush_tlb_range, tsunami_flush_tlb_page
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/* Sliiick... */
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tsunami_flush_cache_page:
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tsunami_flush_cache_range:
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ld [%o0 + VMA_VM_MM], %o0
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tsunami_flush_cache_mm:
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ld [%o0 + AOFF_mm_context], %g2
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cmp %g2, -1
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be tsunami_flush_cache_out
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tsunami_flush_cache_all:
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WINDOW_FLUSH(%g4, %g5)
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tsunami_flush_page_for_dma:
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sta %g0, [%g0] ASI_M_IC_FLCLEAR
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sta %g0, [%g0] ASI_M_DC_FLCLEAR
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tsunami_flush_cache_out:
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tsunami_flush_page_to_ram:
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retl
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nop
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tsunami_flush_sig_insns:
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flush %o1
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retl
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flush %o1 + 4
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/* More slick stuff... */
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tsunami_flush_tlb_range:
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ld [%o0 + VMA_VM_MM], %o0
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tsunami_flush_tlb_mm:
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ld [%o0 + AOFF_mm_context], %g2
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cmp %g2, -1
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be tsunami_flush_tlb_out
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tsunami_flush_tlb_all:
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mov 0x400, %o1
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sta %g0, [%o1] ASI_M_FLUSH_PROBE
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nop
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nop
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nop
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nop
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nop
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tsunami_flush_tlb_out:
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retl
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nop
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/* This one can be done in a fine grained manner... */
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tsunami_flush_tlb_page:
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ld [%o0 + VMA_VM_MM], %o0
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mov SRMMU_CTX_REG, %g1
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ld [%o0 + AOFF_mm_context], %o3
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andn %o1, (PAGE_SIZE - 1), %o1
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cmp %o3, -1
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be tsunami_flush_tlb_page_out
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lda [%g1] ASI_M_MMUREGS, %g5
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sta %o3, [%g1] ASI_M_MMUREGS
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sta %g0, [%o1] ASI_M_FLUSH_PROBE
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nop
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nop
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nop
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nop
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nop
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tsunami_flush_tlb_page_out:
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retl
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sta %g5, [%g1] ASI_M_MMUREGS
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#define MIRROR_BLOCK(dst, src, offset, t0, t1, t2, t3) \
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ldd [src + offset + 0x18], t0; \
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std t0, [dst + offset + 0x18]; \
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ldd [src + offset + 0x10], t2; \
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std t2, [dst + offset + 0x10]; \
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ldd [src + offset + 0x08], t0; \
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std t0, [dst + offset + 0x08]; \
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ldd [src + offset + 0x00], t2; \
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std t2, [dst + offset + 0x00];
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tsunami_copy_1page:
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/* NOTE: This routine has to be shorter than 70insns --jj */
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or %g0, (PAGE_SIZE >> 8), %g1
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1:
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MIRROR_BLOCK(%o0, %o1, 0x00, %o2, %o3, %o4, %o5)
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MIRROR_BLOCK(%o0, %o1, 0x20, %o2, %o3, %o4, %o5)
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MIRROR_BLOCK(%o0, %o1, 0x40, %o2, %o3, %o4, %o5)
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MIRROR_BLOCK(%o0, %o1, 0x60, %o2, %o3, %o4, %o5)
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MIRROR_BLOCK(%o0, %o1, 0x80, %o2, %o3, %o4, %o5)
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MIRROR_BLOCK(%o0, %o1, 0xa0, %o2, %o3, %o4, %o5)
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MIRROR_BLOCK(%o0, %o1, 0xc0, %o2, %o3, %o4, %o5)
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MIRROR_BLOCK(%o0, %o1, 0xe0, %o2, %o3, %o4, %o5)
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subcc %g1, 1, %g1
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add %o0, 0x100, %o0
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bne 1b
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add %o1, 0x100, %o1
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.globl tsunami_setup_blockops
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tsunami_setup_blockops:
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sethi %hi(__copy_1page), %o0
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or %o0, %lo(__copy_1page), %o0
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sethi %hi(tsunami_copy_1page), %o1
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or %o1, %lo(tsunami_copy_1page), %o1
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sethi %hi(tsunami_setup_blockops), %o2
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or %o2, %lo(tsunami_setup_blockops), %o2
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ld [%o1], %o4
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1: add %o1, 4, %o1
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st %o4, [%o0]
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add %o0, 4, %o0
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cmp %o1, %o2
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bne 1b
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ld [%o1], %o4
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sta %g0, [%g0] ASI_M_IC_FLCLEAR
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sta %g0, [%g0] ASI_M_DC_FLCLEAR
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retl
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nop
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