75 lines
1.8 KiB
C
75 lines
1.8 KiB
C
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copied from arch/arm64/kernel/cpufeature.c
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*
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* Copyright (C) 2015 ARM Ltd.
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* Copyright (C) 2017 SiFive
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*/
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#include <linux/of.h>
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#include <asm/processor.h>
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#include <asm/hwcap.h>
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#include <asm/smp.h>
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#include <asm/switch_to.h>
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unsigned long elf_hwcap __read_mostly;
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#ifdef CONFIG_FPU
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bool has_fpu __read_mostly;
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#endif
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void riscv_fill_hwcap(void)
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{
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struct device_node *node;
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const char *isa;
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size_t i;
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static unsigned long isa2hwcap[256] = {0};
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isa2hwcap['i'] = isa2hwcap['I'] = COMPAT_HWCAP_ISA_I;
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isa2hwcap['m'] = isa2hwcap['M'] = COMPAT_HWCAP_ISA_M;
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isa2hwcap['a'] = isa2hwcap['A'] = COMPAT_HWCAP_ISA_A;
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isa2hwcap['f'] = isa2hwcap['F'] = COMPAT_HWCAP_ISA_F;
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isa2hwcap['d'] = isa2hwcap['D'] = COMPAT_HWCAP_ISA_D;
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isa2hwcap['c'] = isa2hwcap['C'] = COMPAT_HWCAP_ISA_C;
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elf_hwcap = 0;
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for_each_of_cpu_node(node) {
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unsigned long this_hwcap = 0;
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if (riscv_of_processor_hartid(node) < 0)
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continue;
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if (of_property_read_string(node, "riscv,isa", &isa)) {
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pr_warn("Unable to find \"riscv,isa\" devicetree entry\n");
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continue;
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}
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for (i = 0; i < strlen(isa); ++i)
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this_hwcap |= isa2hwcap[(unsigned char)(isa[i])];
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/*
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* All "okay" hart should have same isa. Set HWCAP based on
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* common capabilities of every "okay" hart, in case they don't
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* have.
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*/
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if (elf_hwcap)
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elf_hwcap &= this_hwcap;
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else
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elf_hwcap = this_hwcap;
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}
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/* We don't support systems with F but without D, so mask those out
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* here. */
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if ((elf_hwcap & COMPAT_HWCAP_ISA_F) && !(elf_hwcap & COMPAT_HWCAP_ISA_D)) {
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pr_info("This kernel does not support systems with F but not D\n");
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elf_hwcap &= ~COMPAT_HWCAP_ISA_F;
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}
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pr_info("elf_hwcap is 0x%lx\n", elf_hwcap);
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#ifdef CONFIG_FPU
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if (elf_hwcap & (COMPAT_HWCAP_ISA_F | COMPAT_HWCAP_ISA_D))
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has_fpu = true;
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#endif
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}
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