417 lines
7.3 KiB
ArmAsm
417 lines
7.3 KiB
ArmAsm
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; SPDX-License-Identifier: GPL-2.0-only
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;
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; linux/arch/c6x/lib/csum_64plus.s
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;
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; Port on Texas Instruments TMS320C6x architecture
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;
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; Copyright (C) 2006, 2009, 2010, 2011 Texas Instruments Incorporated
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; Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
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;
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#include <linux/linkage.h>
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;
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;unsigned int csum_partial_copy(const char *src, char * dst,
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; int len, int sum)
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;
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; A4: src
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; B4: dst
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; A6: len
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; B6: sum
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; return csum in A4
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;
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.text
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ENTRY(csum_partial_copy)
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MVC .S2 ILC,B30
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MV .D1X B6,A31 ; given csum
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ZERO .D1 A9 ; csum (a side)
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|| ZERO .D2 B9 ; csum (b side)
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|| SHRU .S2X A6,2,B5 ; len / 4
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;; Check alignment and size
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AND .S1 3,A4,A1
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|| AND .S2 3,B4,B0
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OR .L2X B0,A1,B0 ; non aligned condition
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|| MVC .S2 B5,ILC
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|| MVK .D2 1,B2
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|| MV .D1X B5,A1 ; words condition
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[!A1] B .S1 L8
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[B0] BNOP .S1 L6,5
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SPLOOP 1
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;; Main loop for aligned words
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LDW .D1T1 *A4++,A7
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NOP 4
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MV .S2X A7,B7
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|| EXTU .S1 A7,0,16,A16
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STW .D2T2 B7,*B4++
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|| MPYU .M2 B7,B2,B8
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|| ADD .L1 A16,A9,A9
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NOP
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SPKERNEL 8,0
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|| ADD .L2 B8,B9,B9
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ZERO .D1 A1
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|| ADD .L1X A9,B9,A9 ; add csum from a and b sides
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L6:
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[!A1] BNOP .S1 L8,5
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;; Main loop for non-aligned words
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SPLOOP 2
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|| MVK .L1 1,A2
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LDNW .D1T1 *A4++,A7
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NOP 3
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NOP
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MV .S2X A7,B7
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|| EXTU .S1 A7,0,16,A16
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|| MPYU .M1 A7,A2,A8
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ADD .L1 A16,A9,A9
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SPKERNEL 6,0
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|| STNW .D2T2 B7,*B4++
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|| ADD .L1 A8,A9,A9
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L8: AND .S2X 2,A6,B5
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CMPGT .L2 B5,0,B0
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[!B0] BNOP .S1 L82,4
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;; Manage half-word
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ZERO .L1 A7
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|| ZERO .D1 A8
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#ifdef CONFIG_CPU_BIG_ENDIAN
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LDBU .D1T1 *A4++,A7
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LDBU .D1T1 *A4++,A8
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NOP 3
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SHL .S1 A7,8,A0
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ADD .S1 A8,A9,A9
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STB .D2T1 A7,*B4++
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|| ADD .S1 A0,A9,A9
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STB .D2T1 A8,*B4++
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#else
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LDBU .D1T1 *A4++,A7
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LDBU .D1T1 *A4++,A8
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NOP 3
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ADD .S1 A7,A9,A9
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SHL .S1 A8,8,A0
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STB .D2T1 A7,*B4++
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|| ADD .S1 A0,A9,A9
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STB .D2T1 A8,*B4++
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#endif
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;; Manage eventually the last byte
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L82: AND .S2X 1,A6,B0
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[!B0] BNOP .S1 L9,5
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|| ZERO .L1 A7
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L83: LDBU .D1T1 *A4++,A7
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NOP 4
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MV .L2X A7,B7
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#ifdef CONFIG_CPU_BIG_ENDIAN
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STB .D2T2 B7,*B4++
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|| SHL .S1 A7,8,A7
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ADD .S1 A7,A9,A9
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#else
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STB .D2T2 B7,*B4++
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|| ADD .S1 A7,A9,A9
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#endif
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;; Fold the csum
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L9: SHRU .S2X A9,16,B0
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[!B0] BNOP .S1 L10,5
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L91: SHRU .S2X A9,16,B4
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|| EXTU .S1 A9,16,16,A3
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ADD .D1X A3,B4,A9
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SHRU .S1 A9,16,A0
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[A0] BNOP .S1 L91,5
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L10: ADD .D1 A31,A9,A9
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MV .D1 A9,A4
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BNOP .S2 B3,4
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MVC .S2 B30,ILC
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ENDPROC(csum_partial_copy)
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;
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;unsigned short
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;ip_fast_csum(unsigned char *iph, unsigned int ihl)
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;{
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; unsigned int checksum = 0;
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; unsigned short *tosum = (unsigned short *) iph;
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; int len;
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;
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; len = ihl*4;
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;
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; if (len <= 0)
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; return 0;
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;
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; while(len) {
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; len -= 2;
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; checksum += *tosum++;
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; }
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; if (len & 1)
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; checksum += *(unsigned char*) tosum;
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;
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; while(checksum >> 16)
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; checksum = (checksum & 0xffff) + (checksum >> 16);
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;
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; return ~checksum;
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;}
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;
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; A4: iph
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; B4: ihl
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; return checksum in A4
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;
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.text
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ENTRY(ip_fast_csum)
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ZERO .D1 A5
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|| MVC .S2 ILC,B30
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SHL .S2 B4,2,B0
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CMPGT .L2 B0,0,B1
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[!B1] BNOP .S1 L15,4
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[!B1] ZERO .D1 A3
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[!B0] B .S1 L12
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SHRU .S2 B0,1,B0
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MVC .S2 B0,ILC
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NOP 3
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SPLOOP 1
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LDHU .D1T1 *A4++,A3
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NOP 3
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NOP
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SPKERNEL 5,0
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|| ADD .L1 A3,A5,A5
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L12: SHRU .S1 A5,16,A0
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[!A0] BNOP .S1 L14,5
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L13: SHRU .S2X A5,16,B4
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EXTU .S1 A5,16,16,A3
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ADD .D1X A3,B4,A5
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SHRU .S1 A5,16,A0
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[A0] BNOP .S1 L13,5
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L14: NOT .D1 A5,A3
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EXTU .S1 A3,16,16,A3
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L15: BNOP .S2 B3,3
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MVC .S2 B30,ILC
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MV .D1 A3,A4
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ENDPROC(ip_fast_csum)
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;
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;unsigned short
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;do_csum(unsigned char *buff, unsigned int len)
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;{
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; int odd, count;
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; unsigned int result = 0;
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;
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; if (len <= 0)
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; goto out;
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; odd = 1 & (unsigned long) buff;
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; if (odd) {
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;#ifdef __LITTLE_ENDIAN
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; result += (*buff << 8);
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;#else
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; result = *buff;
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;#endif
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; len--;
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; buff++;
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; }
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; count = len >> 1; /* nr of 16-bit words.. */
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; if (count) {
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; if (2 & (unsigned long) buff) {
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; result += *(unsigned short *) buff;
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; count--;
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; len -= 2;
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; buff += 2;
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; }
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; count >>= 1; /* nr of 32-bit words.. */
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; if (count) {
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; unsigned int carry = 0;
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; do {
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; unsigned int w = *(unsigned int *) buff;
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; count--;
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; buff += 4;
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; result += carry;
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; result += w;
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; carry = (w > result);
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; } while (count);
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; result += carry;
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; result = (result & 0xffff) + (result >> 16);
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; }
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; if (len & 2) {
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; result += *(unsigned short *) buff;
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; buff += 2;
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; }
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; }
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; if (len & 1)
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;#ifdef __LITTLE_ENDIAN
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; result += *buff;
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;#else
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; result += (*buff << 8);
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;#endif
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; result = (result & 0xffff) + (result >> 16);
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; /* add up carry.. */
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; result = (result & 0xffff) + (result >> 16);
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; if (odd)
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; result = ((result >> 8) & 0xff) | ((result & 0xff) << 8);
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;out:
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; return result;
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;}
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;
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; A4: buff
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; B4: len
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; return checksum in A4
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;
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ENTRY(do_csum)
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CMPGT .L2 B4,0,B0
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[!B0] BNOP .S1 L26,3
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EXTU .S1 A4,31,31,A0
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MV .L1 A0,A3
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|| MV .S1X B3,A5
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|| MV .L2 B4,B3
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|| ZERO .D1 A1
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#ifdef CONFIG_CPU_BIG_ENDIAN
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[A0] SUB .L2 B3,1,B3
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|| [A0] LDBU .D1T1 *A4++,A1
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#else
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[!A0] BNOP .S1 L21,5
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|| [A0] LDBU .D1T1 *A4++,A0
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SUB .L2 B3,1,B3
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|| SHL .S1 A0,8,A1
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L21:
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#endif
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SHR .S2 B3,1,B0
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[!B0] BNOP .S1 L24,3
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MVK .L1 2,A0
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AND .L1 A4,A0,A0
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[!A0] BNOP .S1 L22,5
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|| [A0] LDHU .D1T1 *A4++,A0
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SUB .L2 B0,1,B0
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|| SUB .S2 B3,2,B3
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|| ADD .L1 A0,A1,A1
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L22:
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SHR .S2 B0,1,B0
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|| ZERO .L1 A0
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[!B0] BNOP .S1 L23,5
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|| [B0] MVC .S2 B0,ILC
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SPLOOP 3
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SPMASK L1
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|| MV .L1 A1,A2
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|| LDW .D1T1 *A4++,A1
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NOP 4
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ADD .L1 A0,A1,A0
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ADD .L1 A2,A0,A2
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SPKERNEL 1,2
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|| CMPGTU .L1 A1,A2,A0
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ADD .L1 A0,A2,A6
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EXTU .S1 A6,16,16,A7
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SHRU .S2X A6,16,B0
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NOP 1
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ADD .L1X A7,B0,A1
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L23:
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MVK .L2 2,B0
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AND .L2 B3,B0,B0
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[B0] LDHU .D1T1 *A4++,A0
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NOP 4
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[B0] ADD .L1 A0,A1,A1
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L24:
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EXTU .S2 B3,31,31,B0
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#ifdef CONFIG_CPU_BIG_ENDIAN
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[!B0] BNOP .S1 L25,4
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|| [B0] LDBU .D1T1 *A4,A0
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SHL .S1 A0,8,A0
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ADD .L1 A0,A1,A1
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L25:
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#else
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[B0] LDBU .D1T1 *A4,A0
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NOP 4
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[B0] ADD .L1 A0,A1,A1
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#endif
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EXTU .S1 A1,16,16,A0
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SHRU .S2X A1,16,B0
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NOP 1
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ADD .L1X A0,B0,A0
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SHRU .S1 A0,16,A1
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ADD .L1 A0,A1,A0
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EXTU .S1 A0,16,16,A1
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EXTU .S1 A1,16,24,A2
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EXTU .S1 A1,24,16,A0
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|| MV .L2X A3,B0
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[B0] OR .L1 A0,A2,A1
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L26:
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NOP 1
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BNOP .S2X A5,4
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MV .L1 A1,A4
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ENDPROC(do_csum)
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|
|
;__wsum csum_partial(const void *buff, int len, __wsum wsum)
|
||
|
|
;{
|
||
|
|
; unsigned int sum = (__force unsigned int)wsum;
|
||
|
|
; unsigned int result = do_csum(buff, len);
|
||
|
|
;
|
||
|
|
; /* add in old sum, and carry.. */
|
||
|
|
; result += sum;
|
||
|
|
; if (sum > result)
|
||
|
|
; result += 1;
|
||
|
|
; return (__force __wsum)result;
|
||
|
|
;}
|
||
|
|
;
|
||
|
|
ENTRY(csum_partial)
|
||
|
|
MV .L1X B3,A9
|
||
|
|
|| CALLP .S2 do_csum,B3
|
||
|
|
|| MV .S1 A6,A8
|
||
|
|
BNOP .S2X A9,2
|
||
|
|
ADD .L1 A8,A4,A1
|
||
|
|
CMPGTU .L1 A8,A1,A0
|
||
|
|
ADD .L1 A1,A0,A4
|
||
|
|
ENDPROC(csum_partial)
|
||
|
|
|
||
|
|
;unsigned short
|
||
|
|
;ip_compute_csum(unsigned char *buff, unsigned int len)
|
||
|
|
;
|
||
|
|
; A4: buff
|
||
|
|
; B4: len
|
||
|
|
; return checksum in A4
|
||
|
|
|
||
|
|
ENTRY(ip_compute_csum)
|
||
|
|
MV .L1X B3,A9
|
||
|
|
|| CALLP .S2 do_csum,B3
|
||
|
|
BNOP .S2X A9,3
|
||
|
|
NOT .S1 A4,A4
|
||
|
|
CLR .S1 A4,16,31,A4
|
||
|
|
ENDPROC(ip_compute_csum)
|