346 lines
8.1 KiB
C
346 lines
8.1 KiB
C
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Driver for 8250/16550-type serial ports
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*
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* Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
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*
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* Copyright (C) 2001 Russell King.
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*/
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#include <linux/serial_8250.h>
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#include <linux/serial_reg.h>
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#include <linux/dmaengine.h>
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#include "../serial_mctrl_gpio.h"
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struct uart_8250_dma {
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int (*tx_dma)(struct uart_8250_port *p);
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int (*rx_dma)(struct uart_8250_port *p);
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/* Filter function */
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dma_filter_fn fn;
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/* Parameter to the filter function */
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void *rx_param;
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void *tx_param;
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struct dma_slave_config rxconf;
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struct dma_slave_config txconf;
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struct dma_chan *rxchan;
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struct dma_chan *txchan;
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/* Device address base for DMA operations */
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phys_addr_t rx_dma_addr;
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phys_addr_t tx_dma_addr;
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/* DMA address of the buffer in memory */
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dma_addr_t rx_addr;
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dma_addr_t tx_addr;
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dma_cookie_t rx_cookie;
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dma_cookie_t tx_cookie;
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void *rx_buf;
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size_t rx_size;
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size_t tx_size;
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unsigned char tx_running;
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unsigned char tx_err;
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unsigned char rx_running;
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};
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struct old_serial_port {
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unsigned int uart;
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unsigned int baud_base;
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unsigned int port;
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unsigned int irq;
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upf_t flags;
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unsigned char io_type;
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unsigned char __iomem *iomem_base;
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unsigned short iomem_reg_shift;
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};
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struct serial8250_config {
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const char *name;
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unsigned short fifo_size;
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unsigned short tx_loadsz;
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unsigned char fcr;
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unsigned char rxtrig_bytes[UART_FCR_R_TRIG_MAX_STATE];
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unsigned int flags;
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};
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#define UART_CAP_FIFO (1 << 8) /* UART has FIFO */
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#define UART_CAP_EFR (1 << 9) /* UART has EFR */
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#define UART_CAP_SLEEP (1 << 10) /* UART has IER sleep */
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#define UART_CAP_AFE (1 << 11) /* MCR-based hw flow control */
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#define UART_CAP_UUE (1 << 12) /* UART needs IER bit 6 set (Xscale) */
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#define UART_CAP_RTOIE (1 << 13) /* UART needs IER bit 4 set (Xscale, Tegra) */
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#define UART_CAP_HFIFO (1 << 14) /* UART has a "hidden" FIFO */
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#define UART_CAP_RPM (1 << 15) /* Runtime PM is active while idle */
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#define UART_CAP_IRDA (1 << 16) /* UART supports IrDA line discipline */
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#define UART_CAP_MINI (1 << 17) /* Mini UART on BCM283X family lacks:
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* STOP PARITY EPAR SPAR WLEN5 WLEN6
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*/
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#define UART_BUG_QUOT (1 << 0) /* UART has buggy quot LSB */
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#define UART_BUG_TXEN (1 << 1) /* UART has buggy TX IIR status */
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#define UART_BUG_NOMSR (1 << 2) /* UART has buggy MSR status bits (Au1x00) */
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#define UART_BUG_THRE (1 << 3) /* UART has buggy THRE reassertion */
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#define UART_BUG_PARITY (1 << 4) /* UART mishandles parity if FIFO enabled */
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#ifdef CONFIG_SERIAL_8250_SHARE_IRQ
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#define SERIAL8250_SHARE_IRQS 1
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#else
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#define SERIAL8250_SHARE_IRQS 0
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#endif
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#define SERIAL8250_PORT_FLAGS(_base, _irq, _flags) \
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{ \
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.iobase = _base, \
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.irq = _irq, \
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.uartclk = 1843200, \
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.iotype = UPIO_PORT, \
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.flags = UPF_BOOT_AUTOCONF | (_flags), \
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}
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#define SERIAL8250_PORT(_base, _irq) SERIAL8250_PORT_FLAGS(_base, _irq, 0)
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static inline int serial_in(struct uart_8250_port *up, int offset)
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{
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return up->port.serial_in(&up->port, offset);
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}
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static inline void serial_out(struct uart_8250_port *up, int offset, int value)
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{
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up->port.serial_out(&up->port, offset, value);
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}
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void serial8250_clear_and_reinit_fifos(struct uart_8250_port *p);
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static inline int serial_dl_read(struct uart_8250_port *up)
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{
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return up->dl_read(up);
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}
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static inline void serial_dl_write(struct uart_8250_port *up, int value)
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{
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up->dl_write(up, value);
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}
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static inline bool serial8250_set_THRI(struct uart_8250_port *up)
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{
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if (up->ier & UART_IER_THRI)
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return false;
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up->ier |= UART_IER_THRI;
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serial_out(up, UART_IER, up->ier);
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return true;
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}
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static inline bool serial8250_clear_THRI(struct uart_8250_port *up)
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{
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if (!(up->ier & UART_IER_THRI))
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return false;
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up->ier &= ~UART_IER_THRI;
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serial_out(up, UART_IER, up->ier);
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return true;
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}
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struct uart_8250_port *serial8250_get_port(int line);
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void serial8250_rpm_get(struct uart_8250_port *p);
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void serial8250_rpm_put(struct uart_8250_port *p);
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void serial8250_rpm_get_tx(struct uart_8250_port *p);
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void serial8250_rpm_put_tx(struct uart_8250_port *p);
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int serial8250_em485_init(struct uart_8250_port *p);
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void serial8250_em485_destroy(struct uart_8250_port *p);
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/* MCR <-> TIOCM conversion */
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static inline int serial8250_TIOCM_to_MCR(int tiocm)
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{
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int mcr = 0;
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if (tiocm & TIOCM_RTS)
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mcr |= UART_MCR_RTS;
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if (tiocm & TIOCM_DTR)
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mcr |= UART_MCR_DTR;
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if (tiocm & TIOCM_OUT1)
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mcr |= UART_MCR_OUT1;
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if (tiocm & TIOCM_OUT2)
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mcr |= UART_MCR_OUT2;
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if (tiocm & TIOCM_LOOP)
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mcr |= UART_MCR_LOOP;
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return mcr;
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}
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static inline int serial8250_MCR_to_TIOCM(int mcr)
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{
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int tiocm = 0;
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if (mcr & UART_MCR_RTS)
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tiocm |= TIOCM_RTS;
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if (mcr & UART_MCR_DTR)
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tiocm |= TIOCM_DTR;
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if (mcr & UART_MCR_OUT1)
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tiocm |= TIOCM_OUT1;
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if (mcr & UART_MCR_OUT2)
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tiocm |= TIOCM_OUT2;
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if (mcr & UART_MCR_LOOP)
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tiocm |= TIOCM_LOOP;
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return tiocm;
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}
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/* MSR <-> TIOCM conversion */
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static inline int serial8250_MSR_to_TIOCM(int msr)
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{
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int tiocm = 0;
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if (msr & UART_MSR_DCD)
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tiocm |= TIOCM_CAR;
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if (msr & UART_MSR_RI)
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tiocm |= TIOCM_RNG;
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if (msr & UART_MSR_DSR)
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tiocm |= TIOCM_DSR;
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if (msr & UART_MSR_CTS)
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tiocm |= TIOCM_CTS;
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return tiocm;
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}
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static inline void serial8250_out_MCR(struct uart_8250_port *up, int value)
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{
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serial_out(up, UART_MCR, value);
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if (up->gpios)
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mctrl_gpio_set(up->gpios, serial8250_MCR_to_TIOCM(value));
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}
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static inline int serial8250_in_MCR(struct uart_8250_port *up)
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{
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int mctrl;
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mctrl = serial_in(up, UART_MCR);
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if (up->gpios) {
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unsigned int mctrl_gpio = 0;
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mctrl_gpio = mctrl_gpio_get_outputs(up->gpios, &mctrl_gpio);
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mctrl |= serial8250_TIOCM_to_MCR(mctrl_gpio);
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}
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return mctrl;
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}
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#if defined(__alpha__) && !defined(CONFIG_PCI)
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/*
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* Digital did something really horribly wrong with the OUT1 and OUT2
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* lines on at least some ALPHA's. The failure mode is that if either
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* is cleared, the machine locks up with endless interrupts.
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*/
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#define ALPHA_KLUDGE_MCR (UART_MCR_OUT2 | UART_MCR_OUT1)
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#else
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#define ALPHA_KLUDGE_MCR 0
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#endif
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#ifdef CONFIG_SERIAL_8250_PNP
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int serial8250_pnp_init(void);
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void serial8250_pnp_exit(void);
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#else
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static inline int serial8250_pnp_init(void) { return 0; }
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static inline void serial8250_pnp_exit(void) { }
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#endif
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#ifdef CONFIG_SERIAL_8250_FINTEK
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int fintek_8250_probe(struct uart_8250_port *uart);
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#else
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static inline int fintek_8250_probe(struct uart_8250_port *uart) { return 0; }
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#endif
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#ifdef CONFIG_ARCH_OMAP1
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static inline int is_omap1_8250(struct uart_8250_port *pt)
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{
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int res;
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switch (pt->port.mapbase) {
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case OMAP1_UART1_BASE:
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case OMAP1_UART2_BASE:
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case OMAP1_UART3_BASE:
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res = 1;
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break;
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default:
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res = 0;
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break;
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}
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return res;
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}
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static inline int is_omap1510_8250(struct uart_8250_port *pt)
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{
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if (!cpu_is_omap1510())
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return 0;
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return is_omap1_8250(pt);
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}
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#else
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static inline int is_omap1_8250(struct uart_8250_port *pt)
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{
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return 0;
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}
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static inline int is_omap1510_8250(struct uart_8250_port *pt)
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{
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return 0;
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}
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#endif
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#ifdef CONFIG_SERIAL_8250_DMA
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extern int serial8250_tx_dma(struct uart_8250_port *);
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extern int serial8250_rx_dma(struct uart_8250_port *);
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extern void serial8250_rx_dma_flush(struct uart_8250_port *);
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extern int serial8250_request_dma(struct uart_8250_port *);
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extern void serial8250_release_dma(struct uart_8250_port *);
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#else
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static inline int serial8250_tx_dma(struct uart_8250_port *p)
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{
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return -1;
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}
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static inline int serial8250_rx_dma(struct uart_8250_port *p)
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{
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return -1;
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}
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static inline void serial8250_rx_dma_flush(struct uart_8250_port *p) { }
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static inline int serial8250_request_dma(struct uart_8250_port *p)
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{
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return -1;
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}
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static inline void serial8250_release_dma(struct uart_8250_port *p) { }
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#endif
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static inline int ns16550a_goto_highspeed(struct uart_8250_port *up)
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{
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unsigned char status;
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status = serial_in(up, 0x04); /* EXCR2 */
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#define PRESL(x) ((x) & 0x30)
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if (PRESL(status) == 0x10) {
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/* already in high speed mode */
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return 0;
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} else {
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status &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
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status |= 0x10; /* 1.625 divisor for baud_base --> 921600 */
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serial_out(up, 0x04, status);
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}
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return 1;
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}
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static inline int serial_index(struct uart_port *port)
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{
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return port->minor - 64;
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}
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