499 lines
8.4 KiB
C
499 lines
8.4 KiB
C
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/* SPDX-License-Identifier: ISC */
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/* Copyright (C) 2019 MediaTek Inc. */
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#ifndef __MT7615_MCU_H
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#define __MT7615_MCU_H
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struct mt7615_mcu_txd {
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__le32 txd[8];
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__le16 len;
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__le16 pq_id;
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u8 cid;
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u8 pkt_type;
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u8 set_query; /* FW don't care */
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u8 seq;
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u8 uc_d2b0_rev;
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u8 ext_cid;
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u8 s2d_index;
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u8 ext_cid_ack;
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u32 reserved[5];
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} __packed __aligned(4);
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/* event table */
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enum {
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MCU_EVENT_TARGET_ADDRESS_LEN = 0x01,
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MCU_EVENT_FW_START = 0x01,
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MCU_EVENT_GENERIC = 0x01,
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MCU_EVENT_ACCESS_REG = 0x02,
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MCU_EVENT_MT_PATCH_SEM = 0x04,
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MCU_EVENT_CH_PRIVILEGE = 0x18,
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MCU_EVENT_EXT = 0xed,
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MCU_EVENT_RESTART_DL = 0xef,
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};
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/* ext event table */
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enum {
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MCU_EXT_EVENT_PS_SYNC = 0x5,
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MCU_EXT_EVENT_FW_LOG_2_HOST = 0x13,
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MCU_EXT_EVENT_THERMAL_PROTECT = 0x22,
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MCU_EXT_EVENT_ASSERT_DUMP = 0x23,
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MCU_EXT_EVENT_RDD_REPORT = 0x3a,
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MCU_EXT_EVENT_CSA_NOTIFY = 0x4f,
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};
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struct mt7615_mcu_rxd {
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__le32 rxd[4];
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__le16 len;
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__le16 pkt_type_id;
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u8 eid;
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u8 seq;
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__le16 __rsv;
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u8 ext_eid;
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u8 __rsv1[2];
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u8 s2d_index;
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};
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#define MCU_PQ_ID(p, q) (((p) << 15) | ((q) << 10))
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#define MCU_PKT_ID 0xa0
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enum {
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MCU_Q_QUERY,
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MCU_Q_SET,
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MCU_Q_RESERVED,
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MCU_Q_NA
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};
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enum {
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MCU_S2D_H2N,
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MCU_S2D_C2N,
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MCU_S2D_H2C,
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MCU_S2D_H2CN
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};
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enum {
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MCU_CMD_TARGET_ADDRESS_LEN_REQ = 0x01,
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MCU_CMD_FW_START_REQ = 0x02,
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MCU_CMD_INIT_ACCESS_REG = 0x3,
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MCU_CMD_PATCH_START_REQ = 0x05,
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MCU_CMD_PATCH_FINISH_REQ = 0x07,
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MCU_CMD_PATCH_SEM_CONTROL = 0x10,
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MCU_CMD_EXT_CID = 0xED,
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MCU_CMD_FW_SCATTER = 0xEE,
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MCU_CMD_RESTART_DL_REQ = 0xEF,
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};
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enum {
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MCU_EXT_CMD_PM_STATE_CTRL = 0x07,
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MCU_EXT_CMD_CHANNEL_SWITCH = 0x08,
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MCU_EXT_CMD_SET_TX_POWER_CTRL = 0x11,
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MCU_EXT_CMD_EFUSE_BUFFER_MODE = 0x21,
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MCU_EXT_CMD_STA_REC_UPDATE = 0x25,
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MCU_EXT_CMD_BSS_INFO_UPDATE = 0x26,
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MCU_EXT_CMD_EDCA_UPDATE = 0x27,
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MCU_EXT_CMD_DEV_INFO_UPDATE = 0x2A,
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MCU_EXT_CMD_GET_TEMP = 0x2c,
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MCU_EXT_CMD_WTBL_UPDATE = 0x32,
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MCU_EXT_CMD_SET_RDD_CTRL = 0x3a,
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MCU_EXT_CMD_PROTECT_CTRL = 0x3e,
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MCU_EXT_CMD_MAC_INIT_CTRL = 0x46,
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MCU_EXT_CMD_BCN_OFFLOAD = 0x49,
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MCU_EXT_CMD_SET_RX_PATH = 0x4e,
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MCU_EXT_CMD_SET_RDD_PATTERN = 0x7d,
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};
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enum {
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PATCH_SEM_RELEASE = 0x0,
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PATCH_SEM_GET = 0x1
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};
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enum {
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PATCH_NOT_DL_SEM_FAIL = 0x0,
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PATCH_IS_DL = 0x1,
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PATCH_NOT_DL_SEM_SUCCESS = 0x2,
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PATCH_REL_SEM_SUCCESS = 0x3
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};
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enum {
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FW_STATE_INITIAL = 0,
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FW_STATE_FW_DOWNLOAD = 1,
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FW_STATE_NORMAL_OPERATION = 2,
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FW_STATE_NORMAL_TRX = 3,
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FW_STATE_CR4_RDY = 7
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};
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#define STA_TYPE_STA BIT(0)
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#define STA_TYPE_AP BIT(1)
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#define STA_TYPE_ADHOC BIT(2)
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#define STA_TYPE_WDS BIT(4)
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#define STA_TYPE_BC BIT(5)
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#define NETWORK_INFRA BIT(16)
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#define NETWORK_P2P BIT(17)
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#define NETWORK_IBSS BIT(18)
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#define NETWORK_WDS BIT(21)
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#define CONNECTION_INFRA_STA (STA_TYPE_STA | NETWORK_INFRA)
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#define CONNECTION_INFRA_AP (STA_TYPE_AP | NETWORK_INFRA)
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#define CONNECTION_P2P_GC (STA_TYPE_STA | NETWORK_P2P)
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#define CONNECTION_P2P_GO (STA_TYPE_AP | NETWORK_P2P)
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#define CONNECTION_IBSS_ADHOC (STA_TYPE_ADHOC | NETWORK_IBSS)
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#define CONNECTION_WDS (STA_TYPE_WDS | NETWORK_WDS)
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#define CONNECTION_INFRA_BC (STA_TYPE_BC | NETWORK_INFRA)
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#define CONN_STATE_DISCONNECT 0
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#define CONN_STATE_CONNECT 1
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#define CONN_STATE_PORT_SECURE 2
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enum {
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DEV_INFO_ACTIVE,
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DEV_INFO_MAX_NUM
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};
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struct bss_info_omac {
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__le16 tag;
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__le16 len;
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u8 hw_bss_idx;
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u8 omac_idx;
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u8 band_idx;
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u8 rsv0;
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__le32 conn_type;
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u32 rsv1;
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} __packed;
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struct bss_info_basic {
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__le16 tag;
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__le16 len;
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__le32 network_type;
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u8 active;
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u8 rsv0;
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__le16 bcn_interval;
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u8 bssid[ETH_ALEN];
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u8 wmm_idx;
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u8 dtim_period;
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u8 bmc_tx_wlan_idx;
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u8 cipher; /* not used */
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u8 phymode; /* not used */
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u8 rsv1[5];
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} __packed;
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struct bss_info_rf_ch {
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__le16 tag;
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__le16 len;
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u8 pri_ch;
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u8 central_ch0;
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u8 central_ch1;
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u8 bw;
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} __packed;
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struct bss_info_ext_bss {
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__le16 tag;
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__le16 len;
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__le32 mbss_tsf_offset; /* in unit of us */
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u8 rsv[8];
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} __packed;
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enum {
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BSS_INFO_OMAC,
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BSS_INFO_BASIC,
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BSS_INFO_RF_CH, /* optional, for BT/LTE coex */
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BSS_INFO_PM, /* sta only */
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BSS_INFO_UAPSD, /* sta only */
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BSS_INFO_ROAM_DETECTION, /* obsoleted */
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BSS_INFO_LQ_RM, /* obsoleted */
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BSS_INFO_EXT_BSS,
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BSS_INFO_BMC_INFO, /* for bmc rate control in CR4 */
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BSS_INFO_SYNC_MODE, /* obsoleted */
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BSS_INFO_RA,
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BSS_INFO_MAX_NUM
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};
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enum {
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WTBL_RESET_AND_SET = 1,
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WTBL_SET,
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WTBL_QUERY,
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WTBL_RESET_ALL
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};
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struct wtbl_req_hdr {
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u8 wlan_idx;
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u8 operation;
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__le16 tlv_num;
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u8 rsv[4];
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} __packed;
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struct wtbl_generic {
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__le16 tag;
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__le16 len;
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u8 peer_addr[ETH_ALEN];
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u8 muar_idx;
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u8 skip_tx;
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u8 cf_ack;
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u8 qos;
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u8 mesh;
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u8 adm;
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__le16 partial_aid;
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u8 baf_en;
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u8 aad_om;
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} __packed;
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struct wtbl_rx {
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__le16 tag;
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__le16 len;
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u8 rcid;
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u8 rca1;
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u8 rca2;
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u8 rv;
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u8 rsv[4];
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} __packed;
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struct wtbl_ht {
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__le16 tag;
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__le16 len;
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u8 ht;
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u8 ldpc;
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u8 af;
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u8 mm;
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u8 rsv[4];
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} __packed;
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struct wtbl_vht {
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__le16 tag;
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__le16 len;
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u8 ldpc;
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u8 dyn_bw;
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u8 vht;
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u8 txop_ps;
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u8 rsv[4];
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} __packed;
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struct wtbl_tx_ps {
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__le16 tag;
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__le16 len;
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u8 txps;
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u8 rsv[3];
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} __packed;
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struct wtbl_hdr_trans {
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__le16 tag;
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__le16 len;
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u8 to_ds;
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u8 from_ds;
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u8 disable_rx_trans;
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u8 rsv;
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} __packed;
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enum {
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MT_BA_TYPE_INVALID,
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MT_BA_TYPE_ORIGINATOR,
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MT_BA_TYPE_RECIPIENT
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};
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enum {
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RST_BA_MAC_TID_MATCH,
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RST_BA_MAC_MATCH,
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RST_BA_NO_MATCH
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};
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struct wtbl_ba {
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__le16 tag;
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__le16 len;
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/* common */
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u8 tid;
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u8 ba_type;
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u8 rsv0[2];
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/* originator only */
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__le16 sn;
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u8 ba_en;
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u8 ba_winsize_idx;
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__le16 ba_winsize;
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/* recipient only */
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u8 peer_addr[ETH_ALEN];
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u8 rst_ba_tid;
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u8 rst_ba_sel;
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u8 rst_ba_sb;
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u8 band_idx;
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u8 rsv1[4];
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} __packed;
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struct wtbl_bf {
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__le16 tag;
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__le16 len;
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u8 ibf;
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u8 ebf;
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u8 ibf_vht;
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u8 ebf_vht;
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u8 gid;
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u8 pfmu_idx;
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u8 rsv[2];
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} __packed;
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struct wtbl_smps {
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__le16 tag;
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__le16 len;
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u8 smps;
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u8 rsv[3];
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} __packed;
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struct wtbl_pn {
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__le16 tag;
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__le16 len;
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u8 pn[6];
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u8 rsv[2];
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} __packed;
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struct wtbl_spe {
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__le16 tag;
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__le16 len;
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u8 spe_idx;
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u8 rsv[3];
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} __packed;
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struct wtbl_raw {
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__le16 tag;
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__le16 len;
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u8 wtbl_idx;
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u8 dw;
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u8 rsv[2];
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__le32 msk;
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__le32 val;
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} __packed;
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#define MT7615_WTBL_UPDATE_MAX_SIZE (sizeof(struct wtbl_req_hdr) + \
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sizeof(struct wtbl_generic) + \
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sizeof(struct wtbl_rx) + \
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sizeof(struct wtbl_ht) + \
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sizeof(struct wtbl_vht) + \
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sizeof(struct wtbl_tx_ps) + \
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sizeof(struct wtbl_hdr_trans) + \
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sizeof(struct wtbl_ba) + \
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sizeof(struct wtbl_bf) + \
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sizeof(struct wtbl_smps) + \
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sizeof(struct wtbl_pn) + \
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sizeof(struct wtbl_spe))
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enum {
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WTBL_GENERIC,
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WTBL_RX,
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WTBL_HT,
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WTBL_VHT,
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WTBL_PEER_PS, /* not used */
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||
|
|
WTBL_TX_PS,
|
||
|
|
WTBL_HDR_TRANS,
|
||
|
|
WTBL_SEC_KEY,
|
||
|
|
WTBL_BA,
|
||
|
|
WTBL_RDG, /* obsoleted */
|
||
|
|
WTBL_PROTECT, /* not used */
|
||
|
|
WTBL_CLEAR, /* not used */
|
||
|
|
WTBL_BF,
|
||
|
|
WTBL_SMPS,
|
||
|
|
WTBL_RAW_DATA, /* debug only */
|
||
|
|
WTBL_PN,
|
||
|
|
WTBL_SPE,
|
||
|
|
WTBL_MAX_NUM
|
||
|
|
};
|
||
|
|
|
||
|
|
struct sta_req_hdr {
|
||
|
|
u8 bss_idx;
|
||
|
|
u8 wlan_idx;
|
||
|
|
__le16 tlv_num;
|
||
|
|
u8 is_tlv_append;
|
||
|
|
u8 muar_idx;
|
||
|
|
u8 rsv[2];
|
||
|
|
} __packed;
|
||
|
|
|
||
|
|
struct sta_rec_basic {
|
||
|
|
__le16 tag;
|
||
|
|
__le16 len;
|
||
|
|
__le32 conn_type;
|
||
|
|
u8 conn_state;
|
||
|
|
u8 qos;
|
||
|
|
__le16 aid;
|
||
|
|
u8 peer_addr[ETH_ALEN];
|
||
|
|
#define EXTRA_INFO_VER BIT(0)
|
||
|
|
#define EXTRA_INFO_NEW BIT(1)
|
||
|
|
__le16 extra_info;
|
||
|
|
} __packed;
|
||
|
|
|
||
|
|
struct sta_rec_ht {
|
||
|
|
__le16 tag;
|
||
|
|
__le16 len;
|
||
|
|
__le16 ht_cap;
|
||
|
|
u16 rsv;
|
||
|
|
} __packed;
|
||
|
|
|
||
|
|
struct sta_rec_vht {
|
||
|
|
__le16 tag;
|
||
|
|
__le16 len;
|
||
|
|
__le32 vht_cap;
|
||
|
|
__le16 vht_rx_mcs_map;
|
||
|
|
__le16 vht_tx_mcs_map;
|
||
|
|
} __packed;
|
||
|
|
|
||
|
|
struct sta_rec_ba {
|
||
|
|
__le16 tag;
|
||
|
|
__le16 len;
|
||
|
|
u8 tid;
|
||
|
|
u8 ba_type;
|
||
|
|
u8 amsdu;
|
||
|
|
u8 ba_en;
|
||
|
|
__le16 ssn;
|
||
|
|
__le16 winsize;
|
||
|
|
} __packed;
|
||
|
|
|
||
|
|
#define MT7615_STA_REC_UPDATE_MAX_SIZE (sizeof(struct sta_rec_basic) + \
|
||
|
|
sizeof(struct sta_rec_ht) + \
|
||
|
|
sizeof(struct sta_rec_vht))
|
||
|
|
|
||
|
|
enum {
|
||
|
|
STA_REC_BASIC,
|
||
|
|
STA_REC_RA,
|
||
|
|
STA_REC_RA_CMM_INFO,
|
||
|
|
STA_REC_RA_UPDATE,
|
||
|
|
STA_REC_BF,
|
||
|
|
STA_REC_AMSDU, /* for CR4 */
|
||
|
|
STA_REC_BA,
|
||
|
|
STA_REC_RED, /* not used */
|
||
|
|
STA_REC_TX_PROC, /* for hdr trans and CSO in CR4 */
|
||
|
|
STA_REC_HT,
|
||
|
|
STA_REC_VHT,
|
||
|
|
STA_REC_APPS,
|
||
|
|
STA_REC_MAX_NUM
|
||
|
|
};
|
||
|
|
|
||
|
|
enum {
|
||
|
|
CMD_CBW_20MHZ,
|
||
|
|
CMD_CBW_40MHZ,
|
||
|
|
CMD_CBW_80MHZ,
|
||
|
|
CMD_CBW_160MHZ,
|
||
|
|
CMD_CBW_10MHZ,
|
||
|
|
CMD_CBW_5MHZ,
|
||
|
|
CMD_CBW_8080MHZ
|
||
|
|
};
|
||
|
|
|
||
|
|
enum {
|
||
|
|
CH_SWITCH_NORMAL = 0,
|
||
|
|
CH_SWITCH_SCAN = 3,
|
||
|
|
CH_SWITCH_MCC = 4,
|
||
|
|
CH_SWITCH_DFS = 5,
|
||
|
|
CH_SWITCH_BACKGROUND_SCAN_START = 6,
|
||
|
|
CH_SWITCH_BACKGROUND_SCAN_RUNNING = 7,
|
||
|
|
CH_SWITCH_BACKGROUND_SCAN_STOP = 8,
|
||
|
|
CH_SWITCH_SCAN_BYPASS_DPD = 9
|
||
|
|
};
|
||
|
|
|
||
|
|
static inline struct sk_buff *
|
||
|
|
mt7615_mcu_msg_alloc(const void *data, int len)
|
||
|
|
{
|
||
|
|
return mt76_mcu_msg_alloc(data, sizeof(struct mt7615_mcu_txd),
|
||
|
|
len, 0);
|
||
|
|
}
|
||
|
|
|
||
|
|
#endif
|