87 lines
2.7 KiB
C
87 lines
2.7 KiB
C
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Intel MIC Platform Software Stack (MPSS)
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*
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* Copyright(c) 2013 Intel Corporation.
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*
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* Intel MIC Host driver.
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*/
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#ifndef _MIC_X100_HW_H_
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#define _MIC_X100_HW_H_
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#define MIC_X100_PCI_DEVICE_2250 0x2250
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#define MIC_X100_PCI_DEVICE_2251 0x2251
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#define MIC_X100_PCI_DEVICE_2252 0x2252
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#define MIC_X100_PCI_DEVICE_2253 0x2253
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#define MIC_X100_PCI_DEVICE_2254 0x2254
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#define MIC_X100_PCI_DEVICE_2255 0x2255
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#define MIC_X100_PCI_DEVICE_2256 0x2256
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#define MIC_X100_PCI_DEVICE_2257 0x2257
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#define MIC_X100_PCI_DEVICE_2258 0x2258
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#define MIC_X100_PCI_DEVICE_2259 0x2259
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#define MIC_X100_PCI_DEVICE_225a 0x225a
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#define MIC_X100_PCI_DEVICE_225b 0x225b
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#define MIC_X100_PCI_DEVICE_225c 0x225c
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#define MIC_X100_PCI_DEVICE_225d 0x225d
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#define MIC_X100_PCI_DEVICE_225e 0x225e
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#define MIC_X100_APER_BAR 0
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#define MIC_X100_MMIO_BAR 4
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#define MIC_X100_SBOX_BASE_ADDRESS 0x00010000
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#define MIC_X100_SBOX_SPAD0 0x0000AB20
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#define MIC_X100_SBOX_SICR0_DBR(x) ((x) & 0xf)
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#define MIC_X100_SBOX_SICR0_DMA(x) (((x) >> 8) & 0xff)
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#define MIC_X100_SBOX_SICE0_DBR(x) ((x) & 0xf)
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#define MIC_X100_SBOX_DBR_BITS(x) ((x) & 0xf)
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#define MIC_X100_SBOX_SICE0_DMA(x) (((x) >> 8) & 0xff)
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#define MIC_X100_SBOX_DMA_BITS(x) (((x) & 0xff) << 8)
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#define MIC_X100_SBOX_APICICR0 0x0000A9D0
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#define MIC_X100_SBOX_SICR0 0x00009004
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#define MIC_X100_SBOX_SICE0 0x0000900C
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#define MIC_X100_SBOX_SICC0 0x00009010
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#define MIC_X100_SBOX_SIAC0 0x00009014
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#define MIC_X100_SBOX_MSIXPBACR 0x00009084
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#define MIC_X100_SBOX_MXAR0 0x00009044
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#define MIC_X100_SBOX_SMPT00 0x00003100
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#define MIC_X100_SBOX_RDMASR0 0x0000B180
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#define MIC_X100_DOORBELL_IDX_START 0
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#define MIC_X100_NUM_DOORBELL 4
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#define MIC_X100_DMA_IDX_START 8
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#define MIC_X100_NUM_DMA 8
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#define MIC_X100_ERR_IDX_START 30
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#define MIC_X100_NUM_ERR 1
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#define MIC_X100_NUM_SBOX_IRQ 8
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#define MIC_X100_NUM_RDMASR_IRQ 8
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#define MIC_X100_RDMASR_IRQ_BASE 17
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#define MIC_X100_SPAD2_DOWNLOAD_STATUS(x) ((x) & 0x1)
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#define MIC_X100_SPAD2_APIC_ID(x) (((x) >> 1) & 0x1ff)
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#define MIC_X100_SPAD2_DOWNLOAD_ADDR(x) ((x) & 0xfffff000)
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#define MIC_X100_SBOX_APICICR7 0x0000AA08
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#define MIC_X100_SBOX_RGCR 0x00004010
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#define MIC_X100_SBOX_SDBIC0 0x0000CC90
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#define MIC_X100_DOWNLOAD_INFO 2
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#define MIC_X100_FW_SIZE 5
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#define MIC_X100_POSTCODE 0x242c
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static const u16 mic_x100_intr_init[] = {
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MIC_X100_DOORBELL_IDX_START,
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MIC_X100_DMA_IDX_START,
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MIC_X100_ERR_IDX_START,
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MIC_X100_NUM_DOORBELL,
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MIC_X100_NUM_DMA,
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MIC_X100_NUM_ERR,
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};
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/* Host->Card(bootstrap) Interrupt Vector */
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#define MIC_X100_BSP_INTERRUPT_VECTOR 229
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extern struct mic_hw_ops mic_x100_ops;
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extern struct mic_smpt_ops mic_x100_smpt_ops;
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extern struct mic_hw_intr_ops mic_x100_intr_ops;
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#endif
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