341 lines
8.4 KiB
C
341 lines
8.4 KiB
C
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* PCI glue for ISHTP provider device (ISH) driver
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*
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* Copyright (c) 2014-2016, Intel Corporation.
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*/
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/kernel.h>
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#include <linux/device.h>
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#include <linux/fs.h>
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#include <linux/errno.h>
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#include <linux/types.h>
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#include <linux/pci.h>
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#include <linux/sched.h>
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#include <linux/suspend.h>
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#include <linux/interrupt.h>
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#include <linux/workqueue.h>
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#define CREATE_TRACE_POINTS
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#include <trace/events/intel_ish.h>
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#include "ishtp-dev.h"
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#include "hw-ish.h"
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static const struct pci_device_id ish_pci_tbl[] = {
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{PCI_DEVICE(PCI_VENDOR_ID_INTEL, CHV_DEVICE_ID)},
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{PCI_DEVICE(PCI_VENDOR_ID_INTEL, BXT_Ax_DEVICE_ID)},
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{PCI_DEVICE(PCI_VENDOR_ID_INTEL, BXT_Bx_DEVICE_ID)},
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{PCI_DEVICE(PCI_VENDOR_ID_INTEL, APL_Ax_DEVICE_ID)},
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{PCI_DEVICE(PCI_VENDOR_ID_INTEL, SPT_Ax_DEVICE_ID)},
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{PCI_DEVICE(PCI_VENDOR_ID_INTEL, CNL_Ax_DEVICE_ID)},
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{PCI_DEVICE(PCI_VENDOR_ID_INTEL, GLK_Ax_DEVICE_ID)},
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{PCI_DEVICE(PCI_VENDOR_ID_INTEL, CNL_H_DEVICE_ID)},
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{PCI_DEVICE(PCI_VENDOR_ID_INTEL, ICL_MOBILE_DEVICE_ID)},
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{PCI_DEVICE(PCI_VENDOR_ID_INTEL, SPT_H_DEVICE_ID)},
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{PCI_DEVICE(PCI_VENDOR_ID_INTEL, CML_LP_DEVICE_ID)},
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{PCI_DEVICE(PCI_VENDOR_ID_INTEL, CMP_H_DEVICE_ID)},
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{PCI_DEVICE(PCI_VENDOR_ID_INTEL, EHL_Ax_DEVICE_ID)},
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{PCI_DEVICE(PCI_VENDOR_ID_INTEL, TGL_LP_DEVICE_ID)},
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{0, }
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};
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MODULE_DEVICE_TABLE(pci, ish_pci_tbl);
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/**
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* ish_event_tracer() - Callback function to dump trace messages
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* @dev: ishtp device
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* @format: printf style format
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*
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* Callback to direct log messages to Linux trace buffers
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*/
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static __printf(2, 3)
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void ish_event_tracer(struct ishtp_device *dev, const char *format, ...)
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{
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if (trace_ishtp_dump_enabled()) {
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va_list args;
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char tmp_buf[100];
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va_start(args, format);
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vsnprintf(tmp_buf, sizeof(tmp_buf), format, args);
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va_end(args);
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trace_ishtp_dump(tmp_buf);
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}
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}
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/**
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* ish_init() - Init function
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* @dev: ishtp device
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*
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* This function initialize wait queues for suspend/resume and call
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* calls hadware initialization function. This will initiate
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* startup sequence
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*
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* Return: 0 for success or error code for failure
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*/
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static int ish_init(struct ishtp_device *dev)
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{
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int ret;
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/* Set the state of ISH HW to start */
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ret = ish_hw_start(dev);
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if (ret) {
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dev_err(dev->devc, "ISH: hw start failed.\n");
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return ret;
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}
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/* Start the inter process communication to ISH processor */
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ret = ishtp_start(dev);
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if (ret) {
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dev_err(dev->devc, "ISHTP: Protocol init failed.\n");
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return ret;
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}
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return 0;
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}
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static const struct pci_device_id ish_invalid_pci_ids[] = {
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/* Mehlow platform special pci ids */
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{PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0xA309)},
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{PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0xA30A)},
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{}
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};
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static inline bool ish_should_enter_d0i3(struct pci_dev *pdev)
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{
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return !pm_suspend_via_firmware() || pdev->device == CHV_DEVICE_ID;
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}
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/**
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* ish_probe() - PCI driver probe callback
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* @pdev: pci device
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* @ent: pci device id
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*
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* Initialize PCI function, setup interrupt and call for ISH initialization
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*
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* Return: 0 for success or error code for failure
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*/
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static int ish_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
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{
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int ret;
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struct ish_hw *hw;
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unsigned long irq_flag = 0;
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struct ishtp_device *ishtp;
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struct device *dev = &pdev->dev;
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/* Check for invalid platforms for ISH support */
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if (pci_dev_present(ish_invalid_pci_ids))
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return -ENODEV;
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/* enable pci dev */
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ret = pcim_enable_device(pdev);
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if (ret) {
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dev_err(dev, "ISH: Failed to enable PCI device\n");
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return ret;
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}
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/* set PCI host mastering */
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pci_set_master(pdev);
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/* pci request regions for ISH driver */
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ret = pcim_iomap_regions(pdev, 1 << 0, KBUILD_MODNAME);
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if (ret) {
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dev_err(dev, "ISH: Failed to get PCI regions\n");
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return ret;
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}
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/* allocates and initializes the ISH dev structure */
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ishtp = ish_dev_init(pdev);
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if (!ishtp) {
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ret = -ENOMEM;
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return ret;
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}
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hw = to_ish_hw(ishtp);
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ishtp->print_log = ish_event_tracer;
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/* mapping IO device memory */
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hw->mem_addr = pcim_iomap_table(pdev)[0];
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ishtp->pdev = pdev;
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/* request and enable interrupt */
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ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES);
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if (!pdev->msi_enabled && !pdev->msix_enabled)
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irq_flag = IRQF_SHARED;
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ret = devm_request_irq(dev, pdev->irq, ish_irq_handler,
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irq_flag, KBUILD_MODNAME, ishtp);
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if (ret) {
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dev_err(dev, "ISH: request IRQ %d failed\n", pdev->irq);
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return ret;
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}
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dev_set_drvdata(ishtp->devc, ishtp);
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init_waitqueue_head(&ishtp->suspend_wait);
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init_waitqueue_head(&ishtp->resume_wait);
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ret = ish_init(ishtp);
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if (ret)
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return ret;
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return 0;
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}
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/**
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* ish_remove() - PCI driver remove callback
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* @pdev: pci device
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*
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* This function does cleanup of ISH on pci remove callback
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*/
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static void ish_remove(struct pci_dev *pdev)
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{
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struct ishtp_device *ishtp_dev = pci_get_drvdata(pdev);
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ishtp_bus_remove_all_clients(ishtp_dev, false);
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ish_device_disable(ishtp_dev);
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}
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static struct device __maybe_unused *ish_resume_device;
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/* 50ms to get resume response */
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#define WAIT_FOR_RESUME_ACK_MS 50
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/**
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* ish_resume_handler() - Work function to complete resume
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* @work: work struct
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*
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* The resume work function to complete resume function asynchronously.
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* There are two resume paths, one where ISH is not powered off,
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* in that case a simple resume message is enough, others we need
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* a reset sequence.
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*/
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static void __maybe_unused ish_resume_handler(struct work_struct *work)
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{
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struct pci_dev *pdev = to_pci_dev(ish_resume_device);
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struct ishtp_device *dev = pci_get_drvdata(pdev);
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int ret;
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/* Check the NO_D3 flag to distinguish the resume paths */
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if (pdev->dev_flags & PCI_DEV_FLAGS_NO_D3) {
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pdev->dev_flags &= ~PCI_DEV_FLAGS_NO_D3;
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disable_irq_wake(pdev->irq);
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ishtp_send_resume(dev);
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/* Waiting to get resume response */
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if (dev->resume_flag)
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ret = wait_event_interruptible_timeout(dev->resume_wait,
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!dev->resume_flag,
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msecs_to_jiffies(WAIT_FOR_RESUME_ACK_MS));
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/*
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* If the flag is not cleared, something is wrong with ISH FW.
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* So on resume, need to go through init sequence again.
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*/
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if (dev->resume_flag)
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ish_init(dev);
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} else {
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/*
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* Resume from the D3, full reboot of ISH processor will happen,
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* so need to go through init sequence again.
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*/
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ish_init(dev);
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}
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}
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/**
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* ish_suspend() - ISH suspend callback
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* @device: device pointer
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*
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* ISH suspend callback
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*
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* Return: 0 to the pm core
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*/
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static int __maybe_unused ish_suspend(struct device *device)
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{
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struct pci_dev *pdev = to_pci_dev(device);
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struct ishtp_device *dev = pci_get_drvdata(pdev);
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if (ish_should_enter_d0i3(pdev)) {
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/*
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* If previous suspend hasn't been asnwered then ISH is likely
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* dead, don't attempt nested notification
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*/
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if (dev->suspend_flag)
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return 0;
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dev->resume_flag = 0;
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dev->suspend_flag = 1;
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ishtp_send_suspend(dev);
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/* 25 ms should be enough for live ISH to flush all IPC buf */
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if (dev->suspend_flag)
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wait_event_interruptible_timeout(dev->suspend_wait,
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!dev->suspend_flag,
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msecs_to_jiffies(25));
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if (dev->suspend_flag) {
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/*
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* It looks like FW halt, clear the DMA bit, and put
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* ISH into D3, and FW would reset on resume.
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*/
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ish_disable_dma(dev);
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} else {
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/* Set the NO_D3 flag, the ISH would enter D0i3 */
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pdev->dev_flags |= PCI_DEV_FLAGS_NO_D3;
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enable_irq_wake(pdev->irq);
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}
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} else {
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/*
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* Clear the DMA bit before putting ISH into D3,
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* or ISH FW would reset automatically.
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*/
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ish_disable_dma(dev);
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}
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return 0;
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}
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static __maybe_unused DECLARE_WORK(resume_work, ish_resume_handler);
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/**
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* ish_resume() - ISH resume callback
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* @device: device pointer
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*
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* ISH resume callback
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*
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* Return: 0 to the pm core
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*/
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static int __maybe_unused ish_resume(struct device *device)
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{
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struct pci_dev *pdev = to_pci_dev(device);
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struct ishtp_device *dev = pci_get_drvdata(pdev);
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ish_resume_device = device;
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dev->resume_flag = 1;
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schedule_work(&resume_work);
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return 0;
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}
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static SIMPLE_DEV_PM_OPS(ish_pm_ops, ish_suspend, ish_resume);
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static struct pci_driver ish_driver = {
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.name = KBUILD_MODNAME,
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.id_table = ish_pci_tbl,
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.probe = ish_probe,
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.remove = ish_remove,
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.driver.pm = &ish_pm_ops,
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};
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module_pci_driver(ish_driver);
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/* Original author */
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MODULE_AUTHOR("Daniel Drubin <daniel.drubin@intel.com>");
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/* Adoption to upstream Linux kernel */
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MODULE_AUTHOR("Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>");
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MODULE_DESCRIPTION("Intel(R) Integrated Sensor Hub PCI Device Driver");
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MODULE_LICENSE("GPL");
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