125 lines
3.1 KiB
Plaintext
125 lines
3.1 KiB
Plaintext
|
// SPDX-License-Identifier: GPL-2.0
|
||
|
/*
|
||
|
* Device Tree Source for J721E SoC Family MCU/WAKEUP Domain peripherals
|
||
|
*
|
||
|
* Copyright (C) 2016-2019 Texas Instruments Incorporated - http://www.ti.com/
|
||
|
*/
|
||
|
|
||
|
&cbass_mcu_wakeup {
|
||
|
dmsc: dmsc@44083000 {
|
||
|
compatible = "ti,k2g-sci";
|
||
|
ti,host-id = <12>;
|
||
|
|
||
|
mbox-names = "rx", "tx";
|
||
|
|
||
|
mboxes= <&secure_proxy_main 11>,
|
||
|
<&secure_proxy_main 13>;
|
||
|
|
||
|
reg-names = "debug_messages";
|
||
|
reg = <0x00 0x44083000 0x0 0x1000>;
|
||
|
|
||
|
k3_pds: power-controller {
|
||
|
compatible = "ti,sci-pm-domain";
|
||
|
#power-domain-cells = <2>;
|
||
|
};
|
||
|
|
||
|
k3_clks: clocks {
|
||
|
compatible = "ti,k2g-sci-clk";
|
||
|
#clock-cells = <2>;
|
||
|
};
|
||
|
|
||
|
k3_reset: reset-controller {
|
||
|
compatible = "ti,sci-reset";
|
||
|
#reset-cells = <2>;
|
||
|
};
|
||
|
};
|
||
|
|
||
|
wkup_pmx0: pinmux@4301c000 {
|
||
|
compatible = "pinctrl-single";
|
||
|
/* Proxy 0 addressing */
|
||
|
reg = <0x00 0x4301c000 0x00 0x178>;
|
||
|
#pinctrl-cells = <1>;
|
||
|
pinctrl-single,register-width = <32>;
|
||
|
pinctrl-single,function-mask = <0xffffffff>;
|
||
|
};
|
||
|
|
||
|
mcu_ram: sram@41c00000 {
|
||
|
compatible = "mmio-sram";
|
||
|
reg = <0x00 0x41c00000 0x00 0x100000>;
|
||
|
ranges = <0x0 0x00 0x41c00000 0x100000>;
|
||
|
#address-cells = <1>;
|
||
|
#size-cells = <1>;
|
||
|
};
|
||
|
|
||
|
wkup_uart0: serial@42300000 {
|
||
|
compatible = "ti,j721e-uart", "ti,am654-uart";
|
||
|
reg = <0x00 0x42300000 0x00 0x100>;
|
||
|
reg-shift = <2>;
|
||
|
reg-io-width = <4>;
|
||
|
interrupts = <GIC_SPI 897 IRQ_TYPE_LEVEL_HIGH>;
|
||
|
clock-frequency = <48000000>;
|
||
|
current-speed = <115200>;
|
||
|
power-domains = <&k3_pds 287 TI_SCI_PD_EXCLUSIVE>;
|
||
|
clocks = <&k3_clks 287 0>;
|
||
|
clock-names = "fclk";
|
||
|
};
|
||
|
|
||
|
mcu_uart0: serial@40a00000 {
|
||
|
compatible = "ti,j721e-uart", "ti,am654-uart";
|
||
|
reg = <0x00 0x40a00000 0x00 0x100>;
|
||
|
reg-shift = <2>;
|
||
|
reg-io-width = <4>;
|
||
|
interrupts = <GIC_SPI 846 IRQ_TYPE_LEVEL_HIGH>;
|
||
|
clock-frequency = <96000000>;
|
||
|
current-speed = <115200>;
|
||
|
power-domains = <&k3_pds 149 TI_SCI_PD_EXCLUSIVE>;
|
||
|
clocks = <&k3_clks 149 0>;
|
||
|
clock-names = "fclk";
|
||
|
};
|
||
|
|
||
|
wkup_gpio_intr: interrupt-controller2 {
|
||
|
compatible = "ti,sci-intr";
|
||
|
ti,intr-trigger-type = <1>;
|
||
|
interrupt-controller;
|
||
|
interrupt-parent = <&gic500>;
|
||
|
#interrupt-cells = <2>;
|
||
|
ti,sci = <&dmsc>;
|
||
|
ti,sci-dst-id = <14>;
|
||
|
ti,sci-rm-range-girq = <0x5>;
|
||
|
};
|
||
|
|
||
|
wkup_gpio0: gpio@42110000 {
|
||
|
compatible = "ti,j721e-gpio", "ti,keystone-gpio";
|
||
|
reg = <0x0 0x42110000 0x0 0x100>;
|
||
|
gpio-controller;
|
||
|
#gpio-cells = <2>;
|
||
|
interrupt-parent = <&wkup_gpio_intr>;
|
||
|
interrupts = <113 0>, <113 1>, <113 2>,
|
||
|
<113 3>, <113 4>, <113 5>;
|
||
|
interrupt-controller;
|
||
|
#interrupt-cells = <2>;
|
||
|
ti,ngpio = <84>;
|
||
|
ti,davinci-gpio-unbanked = <0>;
|
||
|
power-domains = <&k3_pds 113 TI_SCI_PD_EXCLUSIVE>;
|
||
|
clocks = <&k3_clks 113 0>;
|
||
|
clock-names = "gpio";
|
||
|
};
|
||
|
|
||
|
wkup_gpio1: gpio@42100000 {
|
||
|
compatible = "ti,j721e-gpio", "ti,keystone-gpio";
|
||
|
reg = <0x0 0x42100000 0x0 0x100>;
|
||
|
gpio-controller;
|
||
|
#gpio-cells = <2>;
|
||
|
interrupt-parent = <&wkup_gpio_intr>;
|
||
|
interrupts = <114 0>, <114 1>, <114 2>,
|
||
|
<114 3>, <114 4>, <114 5>;
|
||
|
interrupt-controller;
|
||
|
#interrupt-cells = <2>;
|
||
|
ti,ngpio = <84>;
|
||
|
ti,davinci-gpio-unbanked = <0>;
|
||
|
power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>;
|
||
|
clocks = <&k3_clks 114 0>;
|
||
|
clock-names = "gpio";
|
||
|
};
|
||
|
};
|