Siva Durga Prasad Paladugu f60c6fbbc6 ARM: zynq: slcr: Dont modify the reserved bits ... Set only the 0-3 bits of the FPGA_RST_CTRL register as other bits should not be set to 1. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: Nathan Rossi <nathan.rossi@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>		2015-01-26 08:55:57 +01:00
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cpu	ARM: zynq: slcr: Dont modify the reserved bits	2015-01-26 08:55:57 +01:00
dts	Merge branch 'master' of git://git.denx.de/u-boot-spi	2015-01-08 13:50:38 -05:00
imx-common	imx: i2c: Zap unnecessary malloc() calls	2014-12-30 14:05:48 +01:00
include	arm: build arch memset/memcpy in Thumb2 mode	2015-01-09 10:20:22 -05:00
lib	arm: build arch memset/memcpy in Thumb2 mode	2015-01-09 10:20:22 -05:00
mvebu-common	arm: kirkwood: Change naming of dram functions from km_foo() to mvebu_foo()	2014-10-23 09:59:21 -04:00
Kconfig	ARM: UniPhier: select CONFIG_SPL	2014-12-18 23:34:27 +09:00
Kconfig.debug	arm: debug: add Kconfig entries for lowlevel debug	2014-10-26 22:23:12 +01:00
Makefile	Kbuild: introduce Makefile in arch/$ARCH/	2014-12-08 09:35:45 -05:00
config.mk	arm: build arch memset/memcpy in Thumb2 mode	2015-01-09 10:20:22 -05:00