Zhichun Hua db14f11dfe armv8/fsl-lsch3: Fix TCR_EL3 for the final MMU setup. ... When final MMU table is setup in DDR, TCR attributes must match those of the memroy for cacheability and shareability. Signed-off-by: Zhichun Hua <zhichun.hua@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com>		2015-07-20 11:44:40 -07:00
..
arm720t	…
arm920t	…
arm926ejs	mxs: Do not disable bo detection when DC-DC is already enabled	2015-06-01 09:21:54 +02:00
arm946es	…
arm1136	…
arm1176	…
armv7	arm/ls102xa: Add PSCI support for ls102xa	2015-07-20 11:44:38 -07:00
armv7m	ARMv7M: add STM32F1 support	2015-05-28 08:18:24 -04:00
armv8	armv8/fsl-lsch3: Fix TCR_EL3 for the final MMU setup.	2015-07-20 11:44:40 -07:00
pxa	…
sa1100	…
Makefile	…
u-boot-spl.lds	…
u-boot.lds	ARM: Clean up CONFIG_ARMV7_NONSEC/VIRT/PSCI conditions	2015-05-13 09:24:13 -07:00