uboot/arch/x86
Simon Glass e761ecdbb8 x86: Add TSC timer
This timer runs at a rate that can be calculated, well over 100MHz. It is
ideal for accurate timing and does not need interrupt servicing.

Tidy up some old broken and unneeded implementations at the same time.

To provide a consistent view of boot time, we use the same time
base as coreboot. Use the base timestamp supplied by coreboot
as U-Boot's base time.

Signed-off-by: Simon Glass <sjg@chromium.org>base
Signed-off-by: Simon Glass <sjg@chromium.org>
2013-05-13 13:33:21 -07:00
..
cpu x86: Add TSC timer 2013-05-13 13:33:21 -07:00
dts x86: fdt: Create basic .dtsi file for coreboot 2012-12-06 14:30:42 -08:00
include/asm x86: Add TSC timer 2013-05-13 13:33:21 -07:00
lib x86: Add TSC timer 2013-05-13 13:33:21 -07:00
config.mk x86: Enable generic board support 2013-03-15 16:14:00 -04:00