Alexey Brodkin db6ce2312d arc: cache - utilize IO coherency (AKA IOC) engine ... With release of ARC HS38 v2.1 new IO coherency engine could be built-in ARC core. This hardware module ensures coherency between DMA-ed data from peripherals and L2 cache. With L2 and IOC enabled there's no overhead for L2 cache manual maintenance which results in significantly improved IO bandwidth. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>		2016-02-20 11:20:05 +03:00
..
Makefile	arc: fix separate compilation of start.o	2015-04-10 19:22:40 +03:00
_millicodethunk.S	arc: build libgcc in U-Boot	2015-02-09 16:41:20 +03:00
bootm.c	arc: implement slave cores kick-start for Linux kernel	2015-07-01 17:17:27 +03:00
cache.c	arc: cache - utilize IO coherency (AKA IOC) engine	2016-02-20 11:20:05 +03:00
cpu.c	arc: significant cache rework	2015-07-01 17:17:27 +03:00
init_helpers.c	arc: significant cache rework	2015-07-01 17:17:27 +03:00
interrupts.c	…
ints_low.S	arc: move low-level interrupt and exception handlers in a separate file	2015-04-03 09:47:49 +03:00
libgcc2.c	arc: build libgcc in U-Boot	2015-02-09 16:41:20 +03:00
libgcc2.h	arc: build libgcc in U-Boot	2015-02-09 16:41:20 +03:00
memcmp.S	…
memcpy-700.S	…
memset.S	…
relocate.c	arc: clean-up init procedure	2015-04-03 09:47:49 +03:00
reset.c	…
sections.c	…
start.S	Fix board init code to respect the C runtime environment	2016-01-13 21:05:17 -05:00
strchr-700.S	…
strcmp.S	…
strcpy-700.S	…
strlen.S	…
timer.c	…