b19e288f47
Add support of 2-stage NAND/SPI/SD boot loader using SPL framework. PBL initializes the internal CPC-SRAM and copy SPL(160K) to it, SPL further initializes DDR using SPD and environment and copy u-boot(768 KB) from SPI/SD/NAND to DDR, finally SPL transfers control to u-boot. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> [York Sun: fix boards.cfg for T2081QDS_SDCARD and _SPIFLASH] Reviewed-by: York Sun <yorksun@freescale.com> |
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| .. | ||
| Makefile | ||
| ddr.c | ||
| ddr.h | ||
| eth_t208xqds.c | ||
| law.c | ||
| pci.c | ||
| spl.c | ||
| t208x_pbi.cfg | ||
| t208xqds.c | ||
| t208xqds.h | ||
| t208xqds_qixis.h | ||
| t2080_rcw.cfg | ||
| t2081_rcw.cfg | ||
| tlb.c | ||