The P2041RDB has almost identical setup for TLB, LAWS, and PCI with other P-Series CoreNet platforms. The only difference between P2041RDB & P3041DS/P4080DS/P5020DS is the CPLD vs PIXIS FPGA which we can handle via some simple #ifdefs in the TLB and LAW setup tables. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
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.. | ||
p_corenet | ||
Makefile | ||
cadmus.c | ||
cadmus.h | ||
cds_pci_ft.c | ||
cds_via.c | ||
eeprom.h | ||
fman.c | ||
fman.h | ||
ics307_clk.c | ||
ics307_clk.h | ||
ngpixis.c | ||
ngpixis.h | ||
pixis.c | ||
pixis.h | ||
pq-mds-pib.c | ||
pq-mds-pib.h | ||
sdhc_boot.c | ||
sgmii_riser.c | ||
sgmii_riser.h | ||
sys_eeprom.c | ||
via.h |