uboot/arch/x86/dts/microcode
Bin Meng 33fb6c0100 x86: ivybridge: Add microcode blobs for all the steppings
This adds microcode blobs created from Intel FSP package for the
Chief River platform. They are for all the Ivy Bridge steppings:
306a2 (B0), 306a4 (C0), 306a5 (K0/M0), 306a8 (E0/L0), except the
306a9 which is already in the U-Boot tree.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
2016-01-13 12:20:15 +08:00
..
m12206a7_00000029.dtsi
m12306a2_00000008.dtsi x86: ivybridge: Add microcode blobs for all the steppings 2016-01-13 12:20:15 +08:00
m12306a4_00000007.dtsi x86: ivybridge: Add microcode blobs for all the steppings 2016-01-13 12:20:15 +08:00
m12306a5_00000007.dtsi x86: ivybridge: Add microcode blobs for all the steppings 2016-01-13 12:20:15 +08:00
m12306a8_00000010.dtsi x86: ivybridge: Add microcode blobs for all the steppings 2016-01-13 12:20:15 +08:00
m12306a9_0000001b.dtsi
m0130673322.dtsi
m0130679901.dtsi
m0220661105_cv.dtsi
m0230671117.dtsi