da53ba0219
This patch adds the "nandecc" command to switch between the SPEAr600 internal 1-bit HW ECC and the 4-bit SW BCH4 ECC. This can be needed to support NAND chips with a stronger ECC than 1-bit, as on the x600. And to dynamically switch between both ECC schemes for backwards compatibility. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> |
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| .. | ||
| Makefile | ||
| cpu.c | ||
| reset.c | ||
| spear600.c | ||
| spl.c | ||
| spr600_mt47h32m16_37e_166_cl4_sync.c | ||
| spr600_mt47h32m16_333_cl5_psync.c | ||
| spr600_mt47h64m16_3_333_cl5_psync.c | ||
| spr600_mt47h128m8_3_266_cl5_async.c | ||
| start.S | ||
| timer.c | ||
| u-boot-spl.lds | ||