44 lines
1.2 KiB
Plaintext
44 lines
1.2 KiB
Plaintext
#
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# Copyright 2014 Freescale Semiconductor
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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Freescale LayerScape with Chassis Generation 3
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This architecture supports Freescale ARMv8 SoCs with Chassis generation 3,
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for example LS2085A.
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Flash Layout
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============
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A typical layout of various images (including Linux and other firmware images)
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is shown below considering a 32MB NOR flash device:
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-------------------------
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| linux |
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------------------------- ----> 0x0120_0000
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| Debug Server |
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------------------------- ----> 0x00C0_0000
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| AIOP SW |
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------------------------- ----> 0x0070_0000
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| MC FW |
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------------------------- ----> 0x006C_0000
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| MC Data Path Layout |
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------------------------- ----> 0x0020_0000
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| BootLoader |
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------------------------- ----> 0x0000_1000
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| PBI |
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------------------------- ----> 0x0000_0080
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| RCW |
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------------------------- ----> 0x0000_0000
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32-MB NOR flash layout
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Environment Variables
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=====================
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mcboottimeout: MC boot timeout in milliseconds. If this variable is not defined
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the value CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS will be assumed.
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mcmemsize: MC DRAM block size. If this variable is not defined, the value
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CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE will be assumed.
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