a61da72bda
Dealing with the sys ctrl register should touch only the relevant bits and not accidently the whole register. On i.MX6, the sys control register contains bits which shouldn't be reset to 0, e.g. SYS_CTRL[3-0] and IPP_RST_N (SYS_CTRL[23]). Do this by read/modify/write instead of just a 32bit write. Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> Acked-by: Stefano Babic <sbabic@denx.de> Signed-off-by: Andy Fleming <afleming@freescale.com> |
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| .. | ||
| Makefile | ||
| arm_pl180_mmci.c | ||
| arm_pl180_mmci.h | ||
| bcm2835_sdhci.c | ||
| bfin_sdh.c | ||
| davinci_mmc.c | ||
| dw_mmc.c | ||
| exynos_dw_mmc.c | ||
| fsl_esdhc.c | ||
| ftsdc010_mci.c | ||
| gen_atmel_mci.c | ||
| mmc.c | ||
| mmc_spi.c | ||
| mv_sdhci.c | ||
| mxcmmc.c | ||
| mxsmmc.c | ||
| omap_hsmmc.c | ||
| pxa_mmc.h | ||
| pxa_mmc_gen.c | ||
| s5p_sdhci.c | ||
| sdhci.c | ||
| sh_mmcif.c | ||
| sh_mmcif.h | ||
| spear_sdhci.c | ||
| tegra_mmc.c | ||
| zynq_sdhci.c | ||