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York Sun 6b1e1254f3 driver/ddr: Add 256 byte interleaving support 
Freescale LayerScape SoCs support controller interleaving on 256 byte size.
This interleaving is mandoratory.

Signed-off-by: York Sun <yorksun@freescale.com>
 		2014-02-21 11:06:13 -05:00
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Makefile Driver/DDR: Add Freescale DDR driver for ARM 2013-11-25 11:43:46 -08:00
arm_ddr_gen3.c driver/ddr: Change Freescale ARM DDR driver to support both big and little endian 2014-02-21 11:06:13 -05:00
ctrl_regs.c driver/ddr: Add 256 byte interleaving support 2014-02-21 11:06:13 -05:00
ddr1_dimm_params.c
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ddr2_dimm_params.c
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ddr3_dimm_params.c
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interactive.c
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lc_common_dimm_params.c
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main.c driver/ddr: Add 256 byte interleaving support 2014-02-21 11:06:13 -05:00
mpc85xx_ddr_gen1.c Driver/DDR: combine ccsr_ddr for 83xx, 85xx and 86xx 2013-11-25 11:43:46 -08:00
mpc85xx_ddr_gen2.c Driver/DDR: combine ccsr_ddr for 83xx, 85xx and 86xx 2013-11-25 11:43:46 -08:00
mpc85xx_ddr_gen3.c powerpc/mpc85xx: Revise workaround for DDR-A003 2014-01-21 13:40:52 -08:00
mpc86xx_ddr.c Driver/DDR: combine ccsr_ddr for 83xx, 85xx and 86xx 2013-11-25 11:43:46 -08:00
options.c driver/ddr: Add 256 byte interleaving support 2014-02-21 11:06:13 -05:00
util.c driver/ddr: Add 256 byte interleaving support 2014-02-21 11:06:13 -05:00