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Prabhakar Kushwaha e87dc41fc1 powerpc/mpc85xx:NAND_SPL:Avoid IFC/eLBC Base address setting 
During NAND_SPL boot, base address and different register are programmed
default by corresponding NAND controllers(eLBC/IFC). These settings are
sufficient enough for NAND SPL.

Avoid updating these register.They will be programmed during NAND RAMBOOT.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
 		2012-07-06 17:30:31 -05:00
..
arm omap3_dss: cosmetic changes 2012-05-25 15:35:25 +02:00
avr32 avr32:board.c: fix compile warning 2012-06-04 09:21:34 +02:00
blackfin CONFIG_SYS_BAUDRATE_TABLE: Add <config_fallbacks.h>, place there 2012-06-20 20:26:16 +02:00
m68k net: move bootfile init into eth_initialize 2012-05-15 17:32:33 -05:00
microblaze net: move bootfile init into eth_initialize 2012-05-15 17:32:33 -05:00
mips MIPS: board.c: move extern declarations to u-boot-mips.h 2012-06-03 23:46:04 +02:00
nds32 net: move bootfile init into eth_initialize 2012-05-15 17:32:33 -05:00
nios2 net: punt bd->bi_ip_addr 2012-05-15 17:32:05 -05:00
openrisc net: punt bd->bi_ip_addr 2012-05-15 17:32:05 -05:00
powerpc powerpc/mpc85xx:NAND_SPL:Avoid IFC/eLBC Base address setting 2012-07-06 17:30:31 -05:00
sandbox net: punt bd->bi_ip_addr 2012-05-15 17:32:05 -05:00
sh sh: Add SH7269 device and RSK2+SH7269 board 2012-05-28 09:12:54 +09:00
sparc net: move bootfile init into eth_initialize 2012-05-15 17:32:33 -05:00
x86 net: move bootfile init into eth_initialize 2012-05-15 17:32:33 -05:00
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