uboot/doc
Simon Glass 7ac99be6e2 x86: Add an ICH6 pin configuration driver
Add a driver which sets up the pin configuration on x86 devices with an ICH6
(or later) Platform Controller Hub.

The driver is not in the pinctrl uclass due to some oddities of the way x86
devices work:

- The GPIO controller is not present in I/O space until it is set up
- This is done by writing a register in the PCH
- The PCH has a driver which itself uses PCI, another driver
- The pinctrl uclass requires that a pinctrl device be available before any
other device can be probed

It would be possible to work around the limitations by:
- Hard-coding the GPIO address rather than reading it from the PCH
- Using special x86 PCI access to set the GPIO address in the PCH

However it is not clear that this is better, since the pin configuration
driver does not actually provide normal pin configuration services - it
simply sets up all the pins statically when probed. While this remains the
case, it seems better to use a syscon uclass instead. This can be probed
whenever it is needed, without any limitations.

Also add an 'invert' property to support inverting the input.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-03-17 10:27:25 +08:00
..
DocBook Various Makefiles: Add SPDX-License-Identifier tags 2015-11-10 09:19:52 -05:00
SPI Use correct spelling of "U-Boot" 2016-02-06 12:00:59 +01:00
SPL
device-tree-bindings x86: Add an ICH6 pin configuration driver 2016-03-17 10:27:25 +08:00
driver-model dm: Remove ARM dcc from the list 2016-02-24 18:44:14 -05:00
uImage.FIT mkimage: Support placing data outside the FIT 2016-03-14 19:18:29 -04:00
I2C_Edge_Conditions
README.440-DDR-performance Use correct spelling of "U-Boot" 2016-02-06 12:00:59 +01:00
README.AMCC-eval-boards-cleanup
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README.at91
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README.distro Fix variable documented in README.distro for PXE address. 2016-02-15 12:04:45 -05:00
README.dns
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README.fec_mxc Use correct spelling of "U-Boot" 2016-02-06 12:00:59 +01:00
README.fsl-clk common/board_f.c: change the macro name and remove it for PPC platforms 2015-10-29 10:33:58 -07:00
README.fsl-ddr Use correct spelling of "U-Boot" 2016-02-06 12:00:59 +01:00
README.fsl-dpaa armv8/ls1043a: Add Fman support 2015-10-29 10:34:01 -07:00
README.fsl-esdhc
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README.fsl-trustzone-components armv8: LS2080A: Rename LS2085A to reflect LS2080A 2015-11-30 08:53:04 -08:00
README.fsl_iim
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README.sched
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README.splashprepare splash_source: add support for filesystem formatted mmc 2015-11-16 12:01:35 +01:00
README.srio-pcie-boot-corenet
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README.t1040-l2switch drivers: net: vsc9953: Add LAG support 2016-01-28 12:22:19 -06:00
README.trace
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README.unaligned-memory-access.txt
README.uniphier ARM: uniphier: document how-to-build for Ace and Sanji boards 2016-03-09 01:10:30 +09:00
README.update Fix typo: commmand -> command. 2015-12-05 18:22:21 -05:00
README.usb
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README.video Use correct spelling of "U-Boot" 2016-02-06 12:00:59 +01:00
README.vxworks doc: Complement document about booting VxWorks 2015-10-21 07:46:26 -06:00
README.watchdog
README.x86 x86: Add a script to aid code conversion from coreboot 2016-03-17 10:27:23 +08:00
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feature-removal-schedule.txt
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kwboot.1
mkimage.1 mkimage: Support placing data outside the FIT 2016-03-14 19:18:29 -04:00

README.zynq

#
# Xilinx ZYNQ U-Boot
#
# (C) Copyright 2013 Xilinx, Inc.
#
# SPDX-License-Identifier:	GPL-2.0+
#

1. About this

This document describes the information about Xilinx Zynq U-Boot -
like supported boards, ML status and TODO list.

2. Zynq boards

Xilinx Zynq-7000 All Programmable SoCs enable extensive system level
differentiation, integration, and flexibility through hardware, software,
and I/O programmability.

* zc702 (single qspi, gem0, mmc) [1]
* zc706 (dual parallel qspi, gem0, mmc) [2]
* zed (single qspi, gem0, mmc) [3]
* microzed (single qspi, gem0, mmc) [4]
* zc770
  - zc770-xm010 (single qspi, gem0, mmc)
  - zc770-xm011 (8 or 16 bit nand)
  - zc770-xm012 (nor)
  - zc770-xm013 (dual parallel qspi, gem1)

3. Building

 ex. configure and build for zc702 board
   $ make zynq_zc702_config
   $ make

4. Bootmode

Zynq has a facility to read the bootmode from the slcr bootmode register
once user is setting through jumpers on the board - see page no:1546 on [5]

All possible bootmode values are defined in Table 6-2:Boot_Mode MIO Pins
on [5].

board_late_init() will read the bootmode values using slcr bootmode register
at runtime and assign the modeboot variable to specific bootmode string which
is intern used in autoboot.

SLCR bootmode register Bit[3:0] values
#define ZYNQ_BM_NOR		0x02
#define ZYNQ_BM_SD		0x05
#define ZYNQ_BM_JTAG		0x0

"modeboot" variable can assign any of "norboot", "sdboot" or "jtagboot"
bootmode strings at runtime.

5. Mainline status

- Added basic board configurations support.
- Added zynq u-boot bsp code - arch/arm/cpu/armv7/zynq
- Added zynq boards named - zc70x, zed, microzed, zc770_xm010, zc770_xm012, zc770_xm013
- Added zynq drivers:
  serial - drivers/serial/serial_zynq.c
  net - drivers/net/zynq_gem.c
  mmc - drivers/mmc/zynq_sdhci.c
  mmc - drivers/mmc/zynq_sdhci.c
  spi-  drivers/spi/zynq_spi.c
  i2c - drivers/i2c/zynq_i2c.c
- Done proper cleanups on board configurations
- Added basic FDT support for zynq boards
- d-cache support for zynq_gem.c

6. TODO

- Add zynq boards support - zc770_xm011
- Add zynq qspi controller driver
- Add zynq nand controller driver
- Add FDT support on individual drivers

[1] http://www.xilinx.com/products/boards-and-kits/EK-Z7-ZC702-G.htm
[2] http://www.xilinx.com/products/boards-and-kits/EK-Z7-ZC706-G.htm
[3] http://zedboard.org/product/zedboard
[4] http://zedboard.org/product/microzed
[5] http://www.xilinx.com/support/documentation/user_guides/ug585-Zynq-7000-TRM.pdf

--
Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Sun Dec 15 14:52:41 IST 2013