Xie Xiaobo 6fbf261f8d Fix two bugs for MPC83xx DDR2 controller SPD Init ... There are a few bugs in the cpu/mpc83xx/spd_sdram.c the first bug is that the picos_to_clk routine introduces a huge rounding error in 83xx. the second bug is that the mode register write recovery field is tWR-1, not tWR >> 1.		2007-04-12 17:39:03 -05:00
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Makefile	mpc83xx: Update 83xx to use fsl_i2c.c	2006-11-03 19:42:23 -06:00
config.mk	* Patch by Eran Liberty	2005-07-28 10:08:46 -05:00
cpu.c	mpc83xx: update [local-]mac-address properties on UEC based devices	2007-03-02 11:05:54 -06:00
cpu_init.c	mpc83xx: Fix config of Arbiter, System Priority, and Clock Mode	2007-03-02 14:08:26 -06:00
interrupts.c	mpc83xx: Miscellaneous code style fixes	2006-11-28 23:34:30 -06:00
qe_io.c	mpc83xx: streamline the 83xx immr head file	2007-03-02 11:05:53 -06:00
spd_sdram.c	Fix two bugs for MPC83xx DDR2 controller SPD Init	2007-04-12 17:39:03 -05:00
speed.c	mpc83xx: Replace CONFIG_MPC8349 and use CONFIG_MPC834X instead	2007-03-02 11:05:53 -06:00
start.S	mpc83xx: Put the version (and magic) after the HRCW.	2007-03-02 11:05:53 -06:00
traps.c	mpc83xx: Miscellaneous code style fixes	2006-11-28 23:34:30 -06:00